Frequency Generation Techniques for Integrated Applications

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Frequency Generation Techniques for Integrated Applications
Thesis by
Roberto Aparicio Joo
In Partial Fulfillment of the Requirements
for the Degree of
Doctor of Philosophy
California Institute of Technology
Pasadena, California

Abstract
This thesis presents novel oscillator topologies and passive structures that demonstrate
improvements in performance compared to existing devices in CMOS. The contributions
of this work include the development of original topologies and concepts together with
practical implications in the area of integrated frequency generation.
A noise-shifting differential Colpitts oscillator topology is proposed. It is less sensitive
to noise generated by the active devices than commonly used integrated oscillator
topologies such as NMOS- or PMOS-only, and complementary cross-coupled. This is
achieved through cyclostationary noise alignment while providing a fully differential
output and large loop gain for reliable start up. An optimization strategy is derived for this
oscillator that is used in the implementation of a CMOS prototype. The performance of
this oscillator is compared to traditional topologies and previously published integrated
oscillators achieving lower phase noise and some of the highest figures of merit,
respectively.
A new circular-geometry oscillator topology is introduced. It allows the
implementation of slab inductors for high-frequency and low-phase noise oscillator
applications. Slab inductors present an attractive alternative for monolitic applications
where low loss, low impedance, and high self-resonance integrated inductors are required.
A general methodology to ensure the proper oscillation mode when several oscillator
cores are coupled in a circular-geometry as well as to achieve a stable dc bias point is
offered. Several circular-geometry CMOS integrated oscillator prototypes are presented as
a proof of concept and their performances are compared to previously published high
frequency oscillators achieving some of the best figures of merit.
Theoretical limits for the capacitance density of integrated capacitors with combined
lateral and vertical field components are derived. These limits are used to investigate the
efficiency of various capacitive structures such as lateral flux and quasi-fractal capacitors.
vii
This study leads to two new capacitor structures with high lateral-field efficiencies. These
new capacitors demonstrate larger capacities, superior matching properties, tighter
tolerances, and higher self-resonance frequencies than the standard horizontal parallel
plate and previously reported lateral-field capacitors, while maintaining comparable
quality factors. These superior qualities are verified by simulation and experimental
results.
Finally, three phase-locked-loops (PLL) are presented. A 6.6GHz PLL for applications
in a concurrent dual-band CMOS receiver is described. Careful frequency planning allows
the generation of the three local oscillator signals required by the entire receiver using
only one PLL, reducing power consumption and chip area considerably. The design issues
of an ultra-low-power PLL prototype implemented in a sub-micron CMOS process are
also discussed. The design of a low-power 3.2GHz PLL implementing a
phase-compensation technique for fractional-N frequency synthesis is described. It uses
an on-chip delay-locked-loop tuning scheme that attenuates the fractional spur
independent of the output frequency and process variations.
viii
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Table of Contents
Acknowledgements iii
Abstract ..................................................................................................................................... v
List of Tables ............................................................................................................................ xi
List of Figures ......................................................................................................................... xiii
Chapter 1: Introduction 1
Chapter 2: Frequency Generation Fundamentals 7
Chapter 3: A Noise Shifting Colpitts VCO 25
Chapter 4: Circular-Geometry Oscillators 59
Chapter 5: Quadrature Signal Generation 77
Chapter 6: Capacity Limits and Matching Properties of Integrated Capacitors
Chapter 7: Closed Loop Frequency Generation 129
Chapter 8: Conclusion 151
Bibliography 155

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