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楼主: magicdog

[转]几道analog面试题

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发表于 2009-1-20 10:44:54 | 显示全部楼层
学习中。。。
发表于 2009-1-20 13:37:05 | 显示全部楼层
我们没学过Ra的书,哎,只学过模拟电路。准备看看拉杂维的书了。
发表于 2009-1-25 17:38:11 | 显示全部楼层
看不懂
发表于 2009-1-27 02:50:35 | 显示全部楼层
very good stuff
发表于 2009-1-29 20:46:22 | 显示全部楼层
there are 3 kind of offset: loop offset, system offset and random offset. In this, random offset is major, many material study this.So some simple word is hard to explain this. If you want to be one good designer, u should study this carefully and consider this when you design one differial pair.
发表于 2009-2-3 13:17:17 | 显示全部楼层
好帖,长见识!希望高手多发发!
发表于 2009-2-5 09:13:21 | 显示全部楼层
谁家的面试题?
发表于 2009-2-11 09:53:06 | 显示全部楼层
拉查维的书以前看得太肤浅,记录了,领教了
发表于 2009-2-13 08:25:43 | 显示全部楼层
学习学习了,谢谢!
发表于 2009-2-19 06:07:52 | 显示全部楼层
For the sake of stability, the gm of second stage is always larger than first stage, usually 8-12 times larger.
To get a PM of 72 degree(no overshoot in frequency domain, only alittle overshoot in time domain but better settling time performance),we need fnd = 3GBW. If you calculate, you will get such expression:gm2/gm1 = 4Cl/Cc. Cc is usually 2-3 times smaller than Cc. Then gm2 is8-12 larger than gm1. Sansen told us in class that when you design anOTA, increasing the current in the second stage will always solve theproblem, but at the cost of power. You can reference the book "Analogdesign essentials" by Willy Sansen, he introduce the design of OTA inchapter 6,7,8.
PMOS has better performance in noise. But use PMOS as the input willintroduce doublet problem. You will find poles and zeros too close toeach other which will affect your time domain applicaion in settlingtime a lot. Furthermore, fT of PMOS is lower than NMOS, which willlower the speed of your circuit.
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