【Synopsys招聘】模拟设计工程师

Snoopy1986 · 发表于 2014-9-4 16:51:17

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工作地点：武汉

Requirement:

- Working from SerDes standards to block specifications, you quickly identify potential circuit architectures and successful design strategies.
- You must have experience in designing at least two of the following key functions: Clock and Data Recovery, PLLs, Transmitters, Receivers, Bandgaps.
- You will work with a cross functional design team of analog and digital designers from a wide variety of backgrounds.
- Our environment is best in class with a full suite of IC design tools supplemented by custom, in-house tools supported by an experienced software/CAD team.
- Experience with tools for schematic entry, IC layout and SPICE simulation is required.
- Knowledgeable in Verilog-A for analog behavioral modeling and simulation-control/data-capture.
- Experience with TCL, perl, C, python, MATLAB, or other scripting languages is desired.

感兴趣的童鞋请发简历至qq邮箱： 54066483@qq.com

Snoopy1986 · 发表于 2014-9-5 09:19:39

自己来顶顶

359705716 · 发表于 2014-9-5 10:29:14

回复 2# Snoopy1986

请问这是社招还是校招？

Snoopy1986 · 发表于 2014-9-5 16:26:52

社招校招都有哦~

Snoopy1986 · 发表于 2014-9-9 11:52:49

有感兴趣的童鞋吗？？？

[招聘] 【Synopsys招聘】模拟设计工程师

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

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