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[招聘] [全职] Synopsys武汉 IP Center 急招ASIC/ Verification Engineer for DDR USB

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发表于 2014-8-7 14:39:31 | 显示全部楼层 |阅读模式

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If you have any interest in the position, please send your bilingual resume as


attachments to

dmliu@synopsys.com


Subject of your email should be “Your Name_ University_ Applied Position Title_ Location”

1\ Job Title: Digital IP Designer ( asic Design or Verification_
USB DDR MIPI SATA)

Location: Wuhan

http://search.51job.com/job/53774338,c.html

Job responsibilities include understanding connectivity protocols like SATA, MIPI, SDMMC, AMBA, HDMI and working on the design/directed verification of designs in such protocols.

Be able to implement test benches and test cases in hdl like verilog is needed.

Requirements:



- Has BSEE in EE with 3+ years of relevant experience or MS with 1+ years of relevant experience in one or more of the following areas:

- Has good background in RTL design and directed verification. Hands on experience with Verilog coding and Simulation tools

-Prior ASIC/IP directed verification skills with essential knowledge of Verilog/ System Verilog

-Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background

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