北京IC职位闪亮登场

jj_seu

北京的IC 职位闪亮登场 简历发boss@hi-talent.com

Job Title : DFT  methodology Engineer

Job Description

1.    Research the leading position of design DFT methodology

2.    Setup and develop advanced design methodology/flow/tools.  

3.    Co-work with design team to deploy the advance methodologies.

4.    Support design teams’ daily implementation process and solve design teams’ tough questions.

Job Requirement

1.    Be familiar with usage of EDA tools, experience of DFT, ATPG，MBIST.

2.    Experience in writing script with Makefile/Tcl/Perl/etc.

3.    Good verbal and written communication and presentation skills in English.

4.    Can focus on details and solve problem carefully, willing to take responsibility to help other engineers.

5.    Experience in IC design is a plus. Experience in synthesis, timing signoff is a plus

6.    BS degree or above, EE/CS majored

Job Title：ESL IP development Engineer (Electronic System Level)  
Job description:  
1.    SystemC model development (Functional / Transaction Level / Cycle Approximate)   
2.    Model verification/correlation with RTL design;  
3.    Embedded Software  development & debugging;

4.    model usage support;
Job requirement:  
1.    Open, Direct, Well communication skill  
2.    SystemC, TLM2.0, C++ modeling  
3.    cpu relative knowledge;  
4.    Embedded system software   
5.    HW/SW co-simulation/debug  

6.    BS degree or above, EE/CS majored

Job Title: Digital front-end implement Methodology Engineer

Job Description

1.    Research the leading position of design implement methodology

2.    Setup and develop advanced design methodology/flow/tools.  

3.    Co-work with design team to deploy the advance methodologies.

4.    Support design teams’ daily implementation process and solve design teams’ tough questions.

Job Requirement

1.    BS degree or above, EE/CS majored.   

2.    Be familiar with usage of EDA tools, experience of chip integration, familiar with IC frontend design flow， include synthesis， LEC.

3.    Experience in writing script with Makefile/Tcl/Perl/etc.

4.    Good verbal and written communication and presentation skills in English.

5.    Can focus on details and solve problem carefully, willing to take responsibility to help other engineers.

6.    Experience in IC design is a plus. Experience in timing signoff or DFT is a plus

Job Title: Design Verification Engineer

Job Description：

1、  IP verification execution such as  bridge for standard bus protocol

2、  Block-level verification execution such as bus fabric block, display block, etc.

3、  Co-work with members from different sites to achieve high verification quality   

Job Requirement：

1、  BS degree or above, EE/CS majored.

2、  experience with popular EDA tools such as VCS/IUS.

3、  experience with professional verification methodologies such Systemverilog(VMM/UVM/OVM)

4、  knowledge of popular standard bus protocol AMBA

5、  Good verification skills and knowledge of Digital Design.

6、  Good communication and problem solving skills

7、  programming skill with Perl/Shell/Makefile/Tcl is a plus