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Job responsibility:
This position will participate in layout design team for analog and mixed signal circuits layout on CMOS and high voltage BCD process. Work through entire chip construction process, from preliminary floor-plan, detailed sub-block layout, and top level integration and routing. Responsible for running full verification sequence using advanced EDA tools. The responsibilities will include but not limited to:
• Leading top level layout floor-plan and integration
• Transistor level sub-block layout based on schematics provide by designers, including careful analog considerations
• Completion of DRC and LVS check and verification tools
• Hold and attend layout reviews
Qualification:
• BSEE or above
• 5+ years working experience as an analog layout design, 3+ years top-level tape out experience
• Experience of high speed circuit analog layout
• Understand IC process basics
• Understand circuit basics and how they impact IC layout strategy
• Good English language skill
• To be able to travel abroad frequently
KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.
If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
“KT人才”微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”即可添加,欢迎大家关注!(关注成功后输入”KT“即可查询职位!) |
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