[北京]Ericsson-FPGA Design & Verification Engineer--北 京

wei_mi1967

爱立信急招如下FPGA Design & Verification 职位，请联系：


weimi@ehanjia.com ，QQ：723839844


工作地点：北京


要求：

有基站、路由、交换机等电信产品FPGA Design 或Verification 经验




职位一：【FPGA Design Consultant Data communication】



Job Title:


FPGA Design Engineer




Job Objective:


To perform FPGA design and maintenance for Ericsson Telecommunication products




Responsibilities:


FPGA design with Verilog or VHDL.


Perform functional simulation and verification.


FPGA delivery and release, on board debug and testing.


Sustaining/maintenance support for FPGA issues for Voice and Data cards, BTS, BSC and Switching Products.


Documentation for related tasks also is responsible for document review, code inspection and other tasks required by quality process.




Qualifications & Requirements:


Good communication skills in English.


More than 1 year working experience on FPGA design in Telecommunication product field. IP broad band, ATM, data communication related experience.


Good Knowledge on FPGA design process and procedure.


Familiar with Verilog or VHDL, System Verilog is a plus.


Be familiar with standard HW protocol and interfaces and IO standards, PCI, PCI-e, SPI-4, SERDES, I2C, SGMII, and Flash/SDRAM.


Good understanding of IO timing, system/FPGA clocking, and system/FPGA reset structure and strategy.


Good sense of co-working with team members under CVS/ClearCase like source control environments is a plus.


Linux environment working capable is a plus; knowledge of script/Shell is a plus.


=================================================================


职位二、【 FPGA design Consultant Radio design (including RU and DU)】


Job Title:


Senior FPGA Design engineer




Job Objective:


To be responsible for Radio FPGA design, integration and maintenance.

Responsibilities:

Be responsible for Radio FPGA design, including DDC, DUC, RRC filter, CIC filter, sample rating mapping, and all external related interfaces.

Be responsible for related documentation of requirement, architecture, design specification and verification

Be responsible for FPGA design, verification and debugging.

Qualifications & Requirements:

More than 1 year working experience in digital IF design, graduated from Telecommunication, computing or related majors. Good telecommunication theory background.

Be familiar with digital IF design, be familiar high speed ADC, DAC and other external analog circuits, be familiar with radio structure and design methodology.

Be good at Verilog and VHDL coding and verification.

Be good at digital filter, frequency conversion, extraction, interpolation design, simulation and FPGA implementation

Be familiar with FPGA interface function and logic, high speed SERDES, parallel bus interfaces, serial bus interfaces.

Be good at English, reading, writing, speaking and listening.

Good sense of co-working with team members under CVS/ClearCase like source control environments is a plus.

Linux environment working capable is a plus; knowledge of script/Shell is a plus.


==============================================================

职位三、【FPGA verification Engineer】


Job Title:

FPGA Verification Engineer (DV)

Job Objective:

To perform functional verification for FPGA designs

Responsibilities:

FPGA simulation and verification strategy planning and architecture design

Feature point extraction and test case planning and design and debugging.

Documentation for related tasks also is responsible for document review, code inspection and other tasks required by quality process.

Qualifications & Requirements:

More than 1 year working experience on FPGA verification in Telecommunication product field.

Good at C/C++ design, good understanding of OOP.

Knowledge and experience of FPGA design is a plus,

Knowledge of SystemVerilog is a plus.

Knowledge on verification methodology, OVM,UVM is a plus

Be familiar with standard protocol and interfaces and IO standards, PCI, PCI-e, Local bus, SERDES, CPRI, I2C, SGMII, Flash/SDRAM.

Good sense of co-working with team members under CVS/ClearCase like source control environments is a plus.

Linux environment working capable is a plus; knowledge of script/Shell is a plus.

wei_mi1967

go on

wei_mi1967

继续。。。。急！

joeljun

回复 1# wei_mi1967


      楼主，可以弱弱地问一下待遇吗，我是做通信方面FPGA验证的，能自主搭建验证平台，使用UVM方法学和VCS工具等。两年       FPGA验证经验。可以私自回复，谢谢

wei_mi1967

回复 4# joeljun




请给我发email或加我QQ了解详情：

weimi@ehanjia.com，QQ：723839844

wei_mi1967

继续。。。

wei_mi1967

go on。。。

wei_mi1967

go on

飞扬紫百合

现在外包不太好招人啊

wei_mi1967

继续招聘，，这个外包有转正机会。。。