asic 简历发ic@hi-talent.com

jj_seu

asic design 简历发ic@hi-talent.com
Job Title:	ASIC Design Intergration   (5)
Job Description:	Responsibility: ·          Integrate GPU blocks as chip based on architectural requirement. ·          Develop RTL code for macro blocks in verilog hdl and make sure functional correct and reusable for different configuration. ·          Synthesis and deliver netlist that meeting timing, area and power requirement. Help PD on the floorplanning and close timing. Requirement: ·          MS degree of EE with 1~ 4 years, or bachelor with 3~7 years working experience in ASIC Company. ·          Familiar with Verilog RTL design and has experience of large digital ASIC project. ·          Familiar with front-end EDA tools and flows (Design compiler, PrimeTime, Conformal,Verde) ·          Familiar with unix/linux and scripts (tcl, perl etc.) ·          Fluent English on talking, presentation and writing documents. ·          Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.

Job Title:	ASIC Design
Job Description:	Responsibility: ·          Define GPU chip level specification, including clock and power targets, IP selection, floorplan review, package definition, PCB spec etc. ·          Estimate GPU performance and TDP before ASIC bring-up. Provide regarding information to make up test plans. ·          Communicate with design and marketing teams to define bounding-box for SKU volumn split. ·          Bring-up ASIC. Guide hardware team to solve design problem in application. Help to short Time-To-Market. Requirement: ·          MS degree of EE with more than 5 years working experience in ASIC Company. ·          Familiar with Verilog RTL design and has experience of large digital ASIC project. ·          Experience for ASIC tapout and bring up. ·          Fluent English on talking, presentation and writing documents. ·          Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.