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Job description
The candidate will be responsible for the architecture and asic design and co-verification of various 802.11 wireless baseband IPs within current and next generation wireless products. The candidate will work within the local dsp/digital development team and closely with system/simulation/verification/RF engineering teams in US to develop and implement DSP/digital blocks to build WiFi IPs.
Job responsibilities includes: spec development and design of DSP/digital blocks, developing co-verification platforms, performing simulations, and solving integration and testing problems during the development, characterization, and production stages of the product. Successful candidate must have the ability to communicate with engineers of various backgrounds: systems, software, digital hardware, RFIC design, and verification
• Extensive hands-on experience in the development of WiFi baseband IC design. The candidate must have at least 8-years development experience on WiFi 802.11 a/g/b including minimum 3 years on 802.11n/ac.
• Deep knowledge and good understanding of: digital communication theory, information theory; specifically on: equalization, Fourier transform, spatial-temporal coding, linear and maximum-likelihood estimation, Viterbi decoding, frequency/ timing estimation and calibration, automatic gain control, transmitter beam forming, diversity combining, and their high-speed DSP/digital implementation.
• Extensive experience with RTL programming languages.
• Experience with verification methodologies and tools and advanced complex RTL/C test-bench developments. The familiarity with UVM environment is a plus.
• Experience with developing algorithms in C, C++, and Mat lab.
• Experience with scripting language such as Perl, Python.
• Must have experience with lab testing and characterization of digital sub-systems.
• Candidate must have strong English communication skills with willingness to interact with various groups within the company.
• Experience with physical design flows, tools, methodologies, and development of timing constraints is a plus.
• Familiarity with flows and tools for co-simulation of RTL and C models is a plus.
• Familiarity with testing and integration of RF and baseband systems in the lab is a plus.
• Experience with implementation of calibration modules for RF/Analog blocks is a plus..
• Typically requires a Master degree and 8 years of experience or a PhD and 5 years, in VLSI/ASIC architecture design or ASIC implementation of digital signal processing function.
KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.
If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
“KT人才”微信也可查询职位啦!打开手机微信,搜号码“KTHR_COM”或查找微信公众帐号“KT人才”即可添加,欢迎大家关注!(关注成功后输入”KT“即可查询职位!) |
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