LVS问题求助(Split Gate Reduction)

janexuechan

大江南北 发表于 2014-2-18 15:18
YES的话，就是合并gdsb连接相同的mos,视为一个mos

有点没理解，图中有gdsb都连接到相同点吗？，看图中只有dgb（或者s）连到了相同点？对于两个IN1来说，是dgb连到了相同点，s是分别连到了两个IN2的d端；对两个IN2来说，是dsb连到了相同点，d是分别连到了两个IN1的s端。在calibre的文档里，也是一样的图，描述的原话是“If there are more than 3 pins, then all optional pins must be connected in parallel. That is, they must all be connected to the same nets, respectively. In MN, MP, ME, MD, M, and equivalent device, source and drain pins may be swapped. In LDD-type and equivalent device, the series connection must be between the source pin of one device and the drain pin of another.” 好吧，这个示意图可能说的是LDD-type的情况？