NO.84-Senior/Staff DFT Design Engineer（Shanghai）

kthr

Description:
- Block, IP and SoC level DFT implementation (bscan, scan, mbist, jtab, analog test structure, etc.)
- work with IP vendor (internal/external) to analyze DFT integation issues
- DFT STA, constraint generation, formal and timing closure
- DFT flow development and maintenance
- test vectors generation and verification
- interface to backend team on physical design and timing closure
- interface to test engineers on ATE and vectors bring-up and debug
- chip DFT quality sign-off

Qualifications:
Must have:
- minimum 4+/8+ years of DFT design and integration experience
- hands on DFT implementation experience (bscan, mbist, scan, IP testablity integration, at-speed
scan, IDDQ test, ATPG and fault simulation)
- expertise with DFT tools from Synopsy, Mentor, Syntest and Logic Vision
- strong logic design and verification backgroud solid experience in STA
- proficient in Perl, tcl and shell programming
- BSEE degree or above
- good team work spirit
Nice to have:
- familiar with DTV/STB architecture, design, and IP
- proficient in C++ and system verilog

KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.

If you interested in the job, pls sent your cv to: hr@kthr.com, thanks!
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