synopsys武汉最新职位

andy_hua

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Business Title	R&D Engineer, II
Requisition Number	5854BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	65
Job Description and Requirements	As part of the Solutions Group at our Wuhan Design Center, China, the selected candidate would be working on one or more aspects of the development of DesignWare family of synthesizable cores, including Specification, Architecting, Design, Verification and Release engineering for Synopsys IP products. The domains would span across areas such as AMBA (AHB, AXI), USB3, Gigabit Ethernet, Multimedia Cards, and MIPI. The candidate would be assigned to work on either the design or verification tasks based on aptitude and business needs; the candidate will be part of a global team of expert Design/Verification Engineers. o    On the design side, the candidate would work on System level and RTL based hardware design using HDLs such as Verilog, and System Verilog; will use Lint tools for rule checking, Synthesis tools, and timing analysis; the designs may involve use of low power design techniques and implemented using Unified Power Flow. o    On the verification side, candidate would work on latest verification methodologies such as UVM, VMM. The verification tasks would include building or enhancement of CRV based complex test environment, test case writing in OOPS based languages such as SystemVerilog, running tests and debugging failures; will include Functional coverage implementation and would involve  usage of industry standard simulators such as VCS. Job Requirement for Fresh Grads: · BSEE/MSEE in Electrical/ Electronic Engineering or allied subjects with minimum qualification marks of 70 % or CGPA of 7.0 and above, in aggregate of all semesters. · It is essential that the individual has – · aptitude to work in the VLSI domain, · strong Digital Design skills, · good communication skills, · good analysis, debug and problem solving skills, The position offers lot of learning opportunities for the candidate by working with the #1 Interface and wide portfolio of IP Provider in the Industry.

Business Title	R&D Engineer, Sr I
Requisition Number	5855BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	66
Job Description and Requirements	R&D Engineer Sr I (Design & Directed Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Design & Directed Verification domain. The position offers learning and growth opportunities in Synopsys’ new Design Center at Wuhan. Job Responsibilities - - Be an individual contributor in the Design Tasks – RTL coding of design, debug, verification coverage improvement in the directed Verilog Test Bench, etc. - Create/ work on designs using Low Power Design Methodology. - May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity functions/ product features for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI - Creates deliverables which do not require close review or supervision by a Senior Technical Lead. - May learn to do technical review of RTL Code of small complexity. - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in directed environment, at least for small/ medium complexity features of the protocol/ product specs. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. Must have BSEE in EE with 6+ years of relevant experience or MSEE with 4+ years of relevant experience in the following areas: - Design of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating micro-architecture/ detailed design from Functional Specifications for small/ medium design complexity. Must have worked on control path oriented designs like asynchronous FIFO, DMA architectures, SPRAM/ DPRAM interface design, etc. - Hands on experience with Verilog/ System Verilog coding and Simulation tools - Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background - Knowledge of C - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills. Candidate may be required to handle complex/ abstract problems

Business Title	R&D Engineer, Sr I
Requisition Number	5856BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	66
Job Description and Requirements	R&D Engineer Sr I (Design & Directed Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Design & Directed Verification domain. The position offers learning and growth opportunities in Synopsys’ new Design Center at Wuhan. Job Responsibilities - - Be an individual contributor in the Design Tasks – RTL coding of design, debug, verification coverage improvement in the directed Verilog Test Bench, etc. - Create/ work on designs using Low Power Design Methodology. - May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity functions/ product features for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI - Creates deliverables which do not require close review or supervision by a Senior Technical Lead. - May learn to do technical review of RTL Code of small complexity. - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in directed environment, at least for small/ medium complexity features of the protocol/ product specs. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. Must have BSEE in EE with 6+ years of relevant experience or MSEE with 4+ years of relevant experience in the following areas: - Design of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating micro-architecture/ detailed design from Functional Specifications for small/ medium design complexity. Must have worked on control path oriented designs like asynchronous FIFO, DMA architectures, SPRAM/ DPRAM interface design, etc. - Hands on experience with Verilog/ System Verilog coding and Simulation tools - Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background - Knowledge of C - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills. Candidate may be required to handle complex/ abstract problems

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Business Title	R&D Engineer, Sr I
Requisition Number	5857BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	66
Job Description and Requirements	R&D Engineer Sr I (Design & Directed Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Design & Directed Verification domain. The position offers learning and growth opportunities in Synopsys’ new Design Center at Wuhan. Job Responsibilities - - Be an individual contributor in the Design Tasks – RTL coding of design, debug, verification coverage improvement in the directed Verilog Test Bench, etc. - Create/ work on designs using Low Power Design Methodology. - May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity functions/ product features for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI - Creates deliverables which do not require close review or supervision by a Senior Technical Lead. - May learn to do technical review of RTL Code of small complexity. - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in directed environment, at least for small/ medium complexity features of the protocol/ product specs. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. Must have BSEE in EE with 6+ years of relevant experience or MSEE with 4+ years of relevant experience in the following areas: - Design of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating micro-architecture/ detailed design from Functional Specifications for small/ medium design complexity. Must have worked on control path oriented designs like asynchronous FIFO, DMA architectures, SPRAM/ DPRAM interface design, etc. - Hands on experience with Verilog/ System Verilog coding and Simulation tools - Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background - Knowledge of C - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills. Candidate may be required to handle complex/ abstract problems.

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Business Title	R&D Engineer, Sr I
Requisition Number	5859BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	66
Job Description and Requirements	R&D Engineer Sr I (Verification – High Level Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain. The position offers learning and growth opportunities in Synopsys’ new Design Center at Wuhan. Job Responsibilities - - Be an individual contributor in the Verification Tasks – coding of TE, debug, verification coverage improvement, etc. - May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity modules in the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI - Creates deliverables which do not require close review or supervision by a Senior Technical Lead. - May learn to do technical review of TE Code of small complexity. - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment, at least for small/ medium complexity features of the protocol/ product specs. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. Must have BSEE in EE with 6+ years of relevant experience or MSEE with 4+ years of relevant experience in the following areas: - Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating detailed design of certain simple components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM/ VMM. - Hands on experience with System Verilog/ VERA coding and Simulation tools; Knowledge of C++/ OOPs Concepts - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills. Candidate may be required to handle complex/ abstract problems

Business Title	R&D Engineer, Sr I
Requisition Number	5860BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	66
Job Description and Requirements	R&D Engineer Sr I (Verification – High Level Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain. The position offers learning and growth opportunities in Synopsys’ new Design Center at Wuhan. Job Responsibilities - - Be an individual contributor in the Verification Tasks – coding of TE, debug, verification coverage improvement, etc. - May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity modules in the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI - Creates deliverables which do not require close review or supervision by a Senior Technical Lead. - May learn to do technical review of TE Code of small complexity. - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment, at least for small/ medium complexity features of the protocol/ product specs. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. Must have BSEE in EE with 6+ years of relevant experience or MSEE with 4+ years of relevant experience in the following areas: - Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating detailed design of certain simple components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM/ VMM. - Hands on experience with System Verilog/ VERA coding and Simulation tools; Knowledge of C++/ OOPs Concepts - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills. Candidate may be required to handle complex/ abstract problems

Business Title	R&D Engineer, Sr I
Requisition Number	5861BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	66
Job Description and Requirements	R&D Engineer Sr I (Verification – High Level Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain. The position offers learning and growth opportunities in Synopsys’ new Design Center at Wuhan. Job Responsibilities - - Be an individual contributor in the Verification Tasks – coding of TE, debug, verification coverage improvement, etc. - May need to understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of small complexity modules in the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI - Creates deliverables which do not require close review or supervision by a Senior Technical Lead. - May learn to do technical review of TE Code of small complexity. - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment, at least for small/ medium complexity features of the protocol/ product specs. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. Must have BSEE in EE with 6+ years of relevant experience or MSEE with 4+ years of relevant experience in the following areas: - Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating detailed design of certain simple components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM/ VMM. - Hands on experience with System Verilog/ VERA coding and Simulation tools; Knowledge of C++/ OOPs Concepts - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills. Candidate may be required to handle complex/ abstract problems

Business Title	R&D Engineer, Sr II
Requisition Number	5862BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	67
Job Description and Requirements	R&D Engineer, Sr II (Design and Directed Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Senior Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Design and Directed Verification domain. Job Responsibilities - - Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of the design. - Be an individual contributor in the Design Tasks – RTL coding of design, synthesis, CDC analysis, debug, verification coverage improvement in directed Verilog test environment, if needed, etc. - May contribute to technical review of RTL Code, VTB Code, etc of small/ medium complexity. - May contribute to technical process and quality improvement to achieve high quality deliveries - May be expected to Solve complex/ abstract problems - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases. - May need to interact with customers to discuss/ understand customers’ specification requirements, if needed for small/ medium complexity. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. Must have BSEE in EE with 10+ years of relevant experience or MSEE with 8+ years of relevant experience in the following areas: - Design of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating micro-architecture/ detailed design from Functional Specifications. Must have worked on control path oriented designs like asynchronous FIFO, DMA architectures, SPRAM/ DPRAM interface design, etc. - Hands on experience with Verilog/ System Verilog coding and Simulation tools - Synthesis flow and static timing flows, Formal checking, etc is a must for candidates with design background - Knowledge of C - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. - Exposure to quality processes in the context of IP design and verification is an added advantage - Ability to work/ Prior experience as a Technical Lead for a small team is a major plus. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills

Business Title	R&D Engineer, Sr II
Requisition Number	5863BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Laury Li
Grade	67
Job Description and Requirements	R&D Engineer, Sr II (Verification) Job role: The candidate will be part of the Solutions Group at our new Design Center at Wuhan, China. This is a Senior Technical Individual Contributor role and offers challenges to work in a multi-site environment on technically challenging IP Cores in the Verification domain. Job Responsibilities - - Understand Standard Specifications/ the functional specifications/ feature enhancements for the product and create micro-architecture and detailed design documents for some of the components of the Test Environment for the DesignWare family of synthesizable cores in protocol areas such as Ethernet/ USB/ SD, Multi-Media Cards/ AMBA (AMBA2, AXI/ MIPI - Be an individual contributor in the Verification Tasks – coding of TE, debug, verification coverage improvement, etc. - May contribute to technical review of TE Code of small/ medium complexity. - May contribute to technical process and quality improvement to achieve high quality deliveries - May be expected to Solve complex/ abstract problems - The candidate should be able to analyze the coverage metrics and improve them with definition of additional test cases in CRV environment. - The candidate will work in a project and team oriented environment with teams spread across multiple sites, worldwide. - Solve complex/ abstract problems - May need to take the role of technical lead for a few of the components of the Test Environment and achieve high quality verification with a small team of verification engineers. Must have BSEE in EE with 10+ years of relevant experience or MSEE with 8+ years of relevant experience in the following areas: - Verification of IP Cores or SoC Designs for Set Top Boxes, Mobile handsets, Smart Devices, etc. - Knowledge of one or more of protocols: Ethernet/USB/SDMMC/AMBA (AMBA2, AXI)/ MIPI - Hands on experience with creating detailed design of certain components of Test Environment from Functional Specifications/ Test Environment Specifications. The TE must have used methodologies such as UVM/ VMM. - Hands on experience with System Verilog/ VERA/ Specman coding and Simulation tools; Knowledge of C++/ OOPs Concepts - Experience with Perforce or similar revision control environment - Knowledge of Perl/Shell scripts. - Exposure to quality processes in the context of IP design and verification is an added advantage - Ability to work/ Prior experience as a Technical Lead for a small team is a major plus. In addition, the candidate will have good communication skills, will be a team player and will have good problem solving skills

Business Title	System CAE
Requisition Number	4690BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Vivian Feng
Hiring Manager (Reports To)	Raza Malik
Grade	65
Job Description and Requirements	The candidate will be to work closely with Synopsys customers, enabling them to design embedded systems based hardware through the efficient use of our CPU core offerings. The systems engineer will be required to prepare board-level demos, benchmark ARC technologies and prepare competitive analysis. The systems engineer will also be required to investigate and answer in-depth technical questions about Synopsys ARC processors as well as the RTL design / debug / verification. Recent graduates and experienced engineers are welcome. Please submit your resume if you meet the "MUST" requirements and at least one "helpful" qualification. Key responsibilities: · Provide ARC core specific hardware development ARChitect tool chain support to Synopsys's customer base/field teams · Strong problem solving ability for RTL and debug through verification capability. · Provide technical content for Synopsys support site (Application Notes, Technical Articles, FAQs) · Feedback to R&D and marketing on problematic product areas and required product enhancements · Participation in product review and release process within technology domain of supported product Requirements (MUST): · RTL Coding (Verilog/System Verilog/System C). · Embedded systems programming. · Knowledge of at least one microprocessor/DSP architecture. · Experience of hardware development using Verilog for ASIC or FPGA development including Usage of RTL coding (Verilog/System Verilog), logic simulation and synthesis, timing analysis, and verification methodologies. · Strong problem solving ability and debug through verification capability. · Excellent oral and written communication skills (English). · Ability and desire to learn. Helpful qualifications: · Previous customer facing experience desirable. · Domain knowledge of ISS (instruction Set Simulator) and FPGA emulation a strong plus. · Comfortable with System C or System Verilog Platform development. · Knowledge of TCL/TK scripting language. · Knowledge of silicon level implications on area, low power, and speed performance. · Knowledge using compilers, linkers, assemblers and debuggers and run subset test programs on · CPU core in C/C++ and assembly code. · Experience in creating customer oriented documentation through usage of commercial standards, such as FrameMaker or equivalent.

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Business Title	Hardware Verification Engineer
Requisition Number	5926BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Heather Yang
Hiring Manager (Reports To)	Jianying Peng
Grade	65
Job Description and Requirements	Hardware Verification Engineer   We are a team working on producing the highly optimized hardware IP compiler for the ARC family of 32-bit configurable processors.   We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers develop highly optimized and very sophisticated embedded designs. Responsibilities · Creation and execution of   Hardware IP Verification Plans · During the hardware verification phase, you will be expected to work closely with the development teams globally and to sign-off on the test plan and execute upon its contents Requirements · Understanding of Hardware Verification Methodologies and best practices – Coverage Driven Verification, constrained random testing, VMM, eRM, OVM, UVM HDL · Proficient in verification languages such as, System Verilog, Verilog, VHDL, Specman e, Vera Ideally, knowledge of, and have verified, processors or processor based systems Knowledge of languages such as,   SystemC, C, Perl, makefile generation Knowledge of tools such as, RTL Simulators, e.g. VCS, IES, Questa Knowledge of Operating Systems such as, Linux, Windows XP/Vista Good analytical skills encompassing: Analysis of product testing requirements Ability to analysis test results and provision reports Excellent written and verbal skills including: Excellent written and spoken English Detailed status reporting Creation, modification and review of test documentation; plans, procedures, scenarios, data, test reports Ability to present verification results to the program management teams BSc or Electrical Engineering as a minimum, or equivalent experience Required Personality Skills Team player keen to work in a global development environment Self motivated Helpful qualifications Experience of working within a global development team

Business Title	R&D Engineer, Sr II
Requisition Number	4684BR
Hiring Location(s)	CHINA - Wuhan
Job Category	Engineering
Business Unit	Solutions Group
Hire Type	Employee
Recruiter	Vivian Feng
Hiring Manager (Reports To)	Bob Gable
Grade	66
Job Description and Requirements	Responsibilities · Enhance and maintain the current and future ARC compiler toolchain products. These include compilers, Eclipse IDE, debuggers, linkers/assemblers, Java GUIs, Linux and real-time operating systems, and processor simulation tools. · Interact with tool engineers and other teams to define, implement and deliver new product features to help Synopsys customers write their software · Perform various benchmarking and engineering testing tasks to improve overall product quality · Assist product marketing and product support teams with pre- and post-sales situations Requirements · Some knowledge or exposure to the internals of software development tools e.g. compiler parsing and back-end code generation, Java GUIs, or open source tool projects · Programming skills in C++, C and optionally Java · Professional experience though the software engineering lifecycle i.e. design, coding, debugging, testing, delivery, support Excellent written and verbal skills including: Written and spoken English Detailed status reporting Ability to present results to management BSCS degree or equivalent, MSCS preferred Required Personality Skills Team player with good communications skills keen to work in a global development environment Self-motivated Helpful qualifications Experience with embedded systems or systems software · Exposure to assembly language programming and instruction-set architectures Experience of working within a multi-site global development team

有兴趣的可以联系我，terry.hua@synopsys.com