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Book Description[size=0.86em]Publication Date: January 31, 2014 | ISBN-10: 3319036580 | ISBN-13: 978-3319036588 | Edition: 2014
This book presents a novel approach to the analysis and design of all-digital phase-locked loops (ADPLLs), technology widely used in wireless communication devices. The authors provide an overview of ADPLL architectures, time-to-digital converters (TDCs) and noise shaping. Realistic(现实的) examples illustrate how to analyze and simulate(模仿的) phase noise in the presence of sigma-delta modulation(调制) and time-to-digital conversion. Readers will gain a deep understanding of ADPLLs and the central role played by noise-shaping. A range of ADPLL and TDC architectures are presented in unified(统一的) manner. Analytical and simulation tools are discussed in detail. Matlab code is included that can be reused to design, simulate and analyze the ADPLL architectures that are presented in the book.
Noise-Shaping All-Digital Phase-Locked Loops.pdf
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