上海 GPU+CPU职位介绍

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上海的 CPU+GPU asic manager职位介绍 -芯得咨询职位简历发[url=mailtoffer@hi-talent.net]offer@hi-talent.net[/url]
Position:                                            ASIC Manager, R&D(
高端大气上档次-一剑封候-经理职位 send resume to IC@hi-talent.net
Location:                                            shanghai, Beijing, Shenzhen,Wuhan, China

Job Purpose and Mandate:
This position of “Manager II, R&D” is a Mixed-Signal Design Manager focusing on ASIC / Digital Design and Verification. In addition to being a manager of Design and Verification Engineers, the mandate of this role is to act as a project lead and technical lead in the design of semiconductor integrated circuits in compliance with the project’s specifications and XXXXs’ design methodologies. The successful candidate will work on a variety of design and verification tasks, incorporating such tasks as, and not limited to, architecture definition, specification generation, RTL coding, behavioural coding, testbench and testcase generation, RTL simulation, synthesis, STA, gate-level simulation, formal verification, documentation, and prototype evaluation. As a Manager, the successful candidate will also be responsible for recruiting, project staffing, project and staff scheduling, performance reviews and career-path development of staff.
Duties:
• Will be responsible for team leadership and project leadership.
• Perform staff recruiting, provide staff training, set and monitor staff schedules and goals, and perform annual performance reviews of staff.
• Generation of design specifications.
• Perform architecture studies for complex digital blocks.
• Write synthesizable RTL code for circuit portions of integrated circuits.
• Write behavioural models.
• Generate testbenches and testcases.
• Perform complex RTL simulations of circuits, interpret the results and optimize the code until the predetermined functionality is satisfied.
• Generate timing constraints for synthesizable designs.
• Perform logic synthesis and/or static timing analysis.
• Perform gate-level simulations of circuits, interpret the results and optimize the design until the predetermined functionality and timing is satisfied.
• Perform mixed-mode simulations.
• Documentation of functionality, code, verification environments/plans, and design procedures.
• May participate in prototype evaluation using bench top laboratory instruments or automated test equipment.
• Communicate with other XXXXs employees regarding customer technical support.
• May communicate directly with customers regarding technical support.
• Other related duties as assigned by the manager.
Requirements:
• Requires a degree in Engineering or Applied Science (or equivalent) and 5+ years working experience in a related field.
• Familiarity with verilog circuit design and design verification.
• Previous staff management experience.
• Previous Team and/or Project Leadership experience.

    本公司由来自于著名公司和顶级研究机构的处理器设计专家创立，核心团队汇聚了处理器体系架构、SoC系统设计、Android操作系统等方面的专家，在处理器体系架构和多核互联架构方面均具有十年以上设计经验。
    公司致力于开发全球领先的自主知识产权CPU+GPU融合内核，和基于此内核的高性能低功耗应用处理器芯片，对于中国移动互联网终端芯片的产业发展具有里程碑的意义。该内核从CPU角度观察，是一个四核、多线程、多发射超标量、全乱序执行的高性能CPU，综合性能超过ARM的下一代高性能处理器内核Cortex A15。该内核从GPU角度观察，是一个四核、统一渲染架构、支持通用计算的GPGPU，支持OpenGL ES 2.0，综合性能超过ARM的GPU内核Mali400MP。
    与其他采用分别的CPU和GPU内核的厂商不同，我们在同一套处理器内核上实现了CPU和GPU，具有其他厂商无可比拟的低功耗、低成本，以及快速切换的动态负载平衡等优势。
    产品主要针对全球高速增长的移动互联网终端市场，可广泛应用于基于Android操作系统的智能手机、平板电脑、智能电视等移动互联网终端。

Best Regards,
Jane.Jin
Principal Consultant & General Manager @ Hi-Talent Consulting Co.,Ltd.
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CPU+GPU？上海威盛兆芯？