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Cadence SH 招聘 Principle SiP/SI/PIEngineer 更多职位信息敬请关注Cadence公众微信平台:Cadence_Recruitment
Ifyou have interest, PLS send your update CV to job_china@cadence.com
Position Description: Completepower-delivery system analyses across chips, packages and boards. System-levelSI analysis, including simultaneous switching noise analysis of high-speedsignal transmissions, and advances physical design for single- and multi-chippackages, states-of-the-art 3D packages, and systems in packaged (SiP). Theengineer should be able to act as a strong team member and contributor. Specificduties include:
- Be responsible for building SI/PI/SiP design flow forHigh-speed IP Design - Proficiency inCadence tools: Allegro and Sigrity -
Proficiency in Hspice or spectre simulation, especiallyin high-speed simulation.
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Good knowledge in modeling, for example IBIS. -
Good knowledge in high-speed PCB design. * At least eight years experience focus on SiP and SI/PIanalysis, excellent communication skills and the uncanny ability to both leadand contribute in a cooperative team environment is required.
Positionrequirements: Essential Qualifications: 1.Must have BS degreewith 10+ years of applicable experience, MS degree with 7+years of applicable experience
in electricalengineering, microelectronics, comparable engineering science or solid statephysics. 2.Essential that theindividual demonstrates strong communication, verbal and written. Requires goodcommunication skills in English.
DesirableQualifications: Aminimum of seven years relevant experience in industry. -At least five years experience driving SiP/PI/SI project. -Will have demonstrated successful completion of 10+ projects as an individualcontributor
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