上海招聘ASIC验证

logan95

某通讯芯片公司招聘ASIC验证工程师

有兴趣的发邮件至xichen95@gmail.com

ASIC Digital Verification Engineer
  
Responsibilities:
l  Make verification plan for one module or whole chip.
l  Build up and maintain module-level and chip-level verification environment
l  Verify ASIC digital design based on case list, and output verification report.
l  Also responsible for lint checking and formal verification.
  
Qualifications:
l  Proficiency in logic verification.
l  Experience with Verilog logic design language.
l  Experience with high-level verification languages such as System Verilog, System C, Vera or Specman e language.
l  Experience with UNIX/Linux simulation tools such as IUS or VCS.
l  Experience with C and C++ is a plus.
l  Experience with C_SHELL, TCL or PERL is a plus.
l  Experience with UVM, OVM or VMM is a plus.
l  Good knowledge of SOC design is a plus.
l  Good knowledge of software design is a plus.
l  Self-motivated and good team player.

wangjunweiair

帮顶！呵呵

timxavier

应届生可以吗？

logan95

顶一下