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[招聘] 新加坡公司 Analog/Mixed-Signal IC Design Expert/ Embedded S

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发表于 2013-9-23 17:58:55 | 显示全部楼层 |阅读模式

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新加坡公司  Analog/Mixed-Signal IC Design Expert/ Embedded System Engineer  


E-Mail: bestgrace@qq.com

QQ: 2043753191

新浪blog:
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新加坡公司,工作好的话,可以到新加坡工作并定居。



Analog/Mixed-Signal IC Design Expert  
  

Description  
In this position, you will be a part of the Analog/Mixed-Signal Design team working on the development of state of the art CMOS circuit designs for high speed, low noise and low power requirements. As an expert for analog IC design in the team, you will be required to assume a technical leadership role in the development of analog/mixed-signal macros for system applications DSL, WLAN, Ethernet or high-speed optic interface.  
You will drive concept design of analog circuits in nm-CMOS technologies, run the implementation and verification, cooperate with the layout team and contribute to laboratory measurement techniques.  
o    Enhanced experience in CMOS analog/mixed-signal design  
o    (e.g. PGA, Filter, ADC, DAC, BGP, LDO, … )  
o    Drive concept development, topology analysis and modeling of CMOS analog circuits  
o    Good know-how of CMOS deep-submicron device parameters and layout dependent effects  
o    Experience in laboratory measurement techniques of analog/mixed-signal modules  
o    Good knowledge of UNIX, Cadence Virtuoso/Spectre, Spice, Matlab and MS-Office  
o    Stress resistant and flexible  


Requirements

o    Degree in electrical engineering or communication technology (university or university of applied sciences)  
o    Professional experience more than 9 years





Embedded System Engineers



Responsibilities

o    Linux Driver/Kernel development for Ethernet/DSL/LTE Modem/Router/Home Gateway

o    Heavy involvement in pre silicon software/firmware/hardware emulation and co-verification

o    System bring up and validation; software integration and qualification

o    Active participation as Key customer expert support/Linux driver porting and kernel migration/software concept profiling

Requirements

o    University degree of computer science or electric engineering

o    Minimum two years' experience of embedded software development

o    Familiar in Linux driver and kernel architecture.

o    Rich experience in Linux kernel/driver development and master the Linux kernel/driver debugger skill

o    Knowledge of XDSL, ETHERNET switch, wireless LAN, Security Engine and microprocessor is an advantage

o    Knowledge of Mercurial/perforce or other version control tools is preferred

o    A Team player; very proactive and self-motivated



Design and Verification



Responsibility

o    Break down of system/chip specification to a digital concept considering feasibility of implementation and verification in close partnership with concept engineering

o    Interfacing with physical design team

o    Digital design (RTL/VHDL coding) taking into account given timing, area, and power targets

o    Development and implementation of algorithms enabling new features  
o    Development of testbenches

o    Definition and execution of block- and chiplevel pre-silicon verification plans by using state-of-the-art verification methodologies  
o    Support in debugging and analysis of chips in lab





Requirement

o    Experience in programming in C, C++, System Verilog and scripting languages (Tcl, Perl) is highly desirable

o    Main focus on Telecommunication Engineering desired

o    Master degree in Electrical Engineering or Information Technology required

o    Experience / Knowledge in Keywords

o    Digital design (RTL/VHDL coding) taking into account given timing, area, and power targets

o    Self motivated with excellent communications skills; willing to take ownership and responsibility

o    Strong ability to work in international teams and projects

o    Experience in clock (re)-generation and distribution in SoCs would be beneficial

o    Wide experience in telecommunication chip architecture, digital circuit design and verification  
o    Proficient in digital design methodologies (VHDL/Verilog; functional, formal and timing verification (STA); synthesis)
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