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[招聘] [猎头急招]IC验证工程师 智能手机数字前端设计经理 高级软件工程

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发表于 2013-8-30 18:16:47 | 显示全部楼层 |阅读模式

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职位职能:  IC验证工程师  



职位描述:



Responsibilities:



Responsibilities will include developing verification environment; developing test plans for and verifying the function of ASIC; hands-on implementation work for every aspect of ASIC verification, working closely with the system group, architects, design and verification teams. The successful candidate should have experience going through at least one complete and successful ASIC design/verification cycle from architecting and creating ASIC test environment to full completion of the verification work. The candidate also needs to have a full understanding of design using Verilog and working experience with SystemVerilog. A strong communication skill in both Chinese and English is required.



  



Qualifications:



5+ years of ASIC verification experience, complex SOC verification experience is preferred



Strong programming skills in SystemVerilog



Knowledgeable in Verilog/Verilog-PLI/SystemC/SVA/C/C++



Working Experience with UVM/OVM/VMM (at least one of them)



Responsible for implementation of verification environment and generation of high quality test cases.



BS/MS EE, CE or CS

  





  智能手机的 数字前端设计经理职位或者engineer



集成电路IC设计/应用工程师  

  

职位描述:



1. This candidate should have mobile/high speed interface background and should be interesting in R&D on Video related technologies.

2. IC/IP background. Be interesting in developing and improving New IP.

3. Integration experience, be able to own testchip tapeout.

4. With at least 3-years IP/Product R&D experience.



Job Description

- RTL coding, new logic design, simulation, synthesis.

- Work closely with algorithm engineer to develop/debug new IP/product. Supports FPGA engineer debugging issues on FPGA system.

- Work closely with system/SW engineer to verificate/validate new IP/product on FPGA/System platform.

- Deliver design/verification/application documents.

Qualification and Experience

- Very familiar with the Verilog HDL language;

- Create the RTL architecture for the algorithm;

- Very familiar with C and C++;

- Familiar with FPGA tool, ModelSim, and Synplify.

- Familiar with the flow of the IC design.



Requirements:

- Bachelor/Master degree in electronic/computer engineering

- Demonstrated abilities in working independently

- Strong communication skills

  



智能手机 高级软件工程师  



职位描述:



Job Description:

- MIPI and eDP SW driver development for low power chip



Requirements:

- Good experience in MIPI or eDP driver development in smart phone or tablet system

- Master or bachelor degree majoring in electronic engineering or computor science is preferred

- 2 years working experience for master degree or 5 years working experience for bachelor degree

- Strong C and/or C++ and/or ASM coding and debugging expertise

- Good experience in embedded system development

- Good Chinese and English communication skills

  



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