First, I want to correct a concept misunderstanding here, spur is one type of phase noise, which results in phase error and in another word, jitter.
Ok, before we walk through your case, may I know how do you test the PLL and the reason you make the conclusion that cp dominate your phase noise measurement.
Couple of things to try, increase cp current, move output freq to another channel, for example
Bottom line is, CP mismatch only create spur, and even with 20% mismatch, it should not dominate your phase noise performance. So, I doubt about your test flow and how you draw the conclusion |