在线咨询 切换到宽版
eetop公众号 创芯大讲堂 创芯人才网

 找回密码
 注册

手机号码,快捷登录

手机号码,快捷登录

搜帖子
查看: 1884|回复: 0

[招聘] RF IC Design Manager(SZ/CD/SH/BJ/no limit)

[复制链接]
发表于 2013-7-2 15:47:14 | 显示全部楼层 |阅读模式

马上注册,结交更多好友,享用更多功能,让你轻松玩转社区。

您需要 登录 才可以下载或查看,没有账号?注册

×
有感兴趣的朋友可以给我发简历哈(dabing.lee@gmail.com),内部推荐,非猎头哈

Summary
Hands on RF/Analog design and trouble-shooting.

Principal Duties and Responsibilities
Hands on RF/Analog design and trouble-shooting.
• Systems level design to create link budgets and provide detailed specifications to IC designers.
• Identify standards d
ocuments and specify the necessary test and simulation conditions for RF  jamming, and interference analysis.
• Define, design, Simulate, and verify discrete components or sub-systems, such as
AGC/Tuning/LNA/VCO/PLL/LPF, on ICs.
• Apply various standards a
nd circuit or design techniques to mitigate or reduce the EMI issues.
• Lead one design team to manage design schedule including tape-out, verification and system validation.

Knowledge, Skills, and Abilities Required
• At least 5+ years experience in RF/Analog circuit design.
• Can demonstrate the ability to do link-budgets, noise-figure and signal level analysis for communication transceivers.
• Experience in ramping one or more products through volume production. Experience with Simulink, matlab, mathca
d, cadence tools is an asset.
• Understanding of RF test equipment and measurement techniques

• Candidates With GPS/BD RF tape out experience is a strong plus

• Candidates knowledge with Low power design and deep submicron RF process tape out experience is a strong plus

您需要登录后才可以回帖 登录 | 注册

本版积分规则

关闭

站长推荐 上一条 /1 下一条

手机版| 小黑屋| 关于我们| 联系我们| 隐私声明| EETOP 创芯网
( 京ICP备:10050787号 京公网安备:11010502037710 )

GMT+8, 2025-9-14 05:35 , Processed in 0.012902 second(s), 5 queries , Gzip On, Redis On.

eetop公众号 创芯大讲堂 创芯人才网
快速回复 返回顶部 返回列表