senior ASIC design Engineer 集成电路IC设计/应用工程师(shanghai)

Mrbear

senior ASIC design Engineer 集成电路IC设计/应用工程师(shanghai)

Responsibilities:
1 IP level micro-architecture, RTL design, verification, synthesis
2 SOC integration including chip level clock/reset structure, low power implementation, synthesis, low power verification and timing closure
3 Participating in company’s engineering update such as methodology improvement, new technology study and evaluation
4 Coordinating joint development with 3rd party:
5 IP selection/management and vendor coordination
6 Interface with 3rd party vendor for successful execution
Requirements:
Must have:
1 BSEE Degree or equivalent
2 3-5 years of experience in hands-on IC design
3 Familiar with ASIC design methodology and SOC architecture.
4 Familiar with standard EDA tools of simulation, synthesis, low power, formal, STA
5 Self-motivated in solving problems
6 Good communication skills and fluent in English.
7 Good team player.
A plus to have:
1 Good scripting skills.
2 Low power design experience
3 Video/DMA design experience.
4 Experience in DFT

有兴趣的朋友请发邮件到aaron_bear@163.com