SystemVerilog Testbench Student Guide & Lab Guide 2011.12（可搜寻 PDF）

lixiayjx · 发表于 2014-11-21 13:50:45

谢谢分享

lixiayjx · 发表于 2014-11-21 13:54:22

文件好大呀

jimcmwang · 发表于 2014-11-24 14:47:21

SystemVerilog Testbench.part1.rar (15 MB)

jimcmwang · 发表于 2014-11-24 14:47:55

SystemVerilog Testbench Student Guide & Lab Guide 2011.12（可搜寻 PDF）
Introduction
The Device Under Test
SystemVerilog Verification Environment
SystemVerilog Testbench Language Basics
Driving and Sampling DUT Signals
Managing Concurrency in SystemVerilog
Object Oriented Programming: Encapsulation
Object Oriented Programming: Randomization
Object Oriented Programming: Inheritance
Inter-Thread Communications
Functional Coverage
SystemVerilog VMM preview