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A simulation method that has proven valuable in
the design of high-speed regenerative comparators such as
those used in pipeline and flash analog-to-digital converters is
presented. This method yields an input-referred offset voltage
for the comparator while it is operating at speed, including
both DC and dynamic effects such as charge injection and
capacitive coupling. The speed and efficiency of the method
allows the circuit designer to more fully explore the design
space, and provides important insights into comparator
operation. |
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