NVIDIA上海急招Tegra SoC验证工程师！！！！

NvidiaHR

亲们~~~NVIDIA上海现有多个SoC验证相关的职位Open，有兴趣的童鞋可以联系我哈~~~

  Sarah Su (HR)

  E-Mail: sasu@nvidia.com

MSN: suwei198702@hotmail.com

QQ: 524786472

PositionTitle: ASIC Design/Verification Engineer

Job Description/Qualifications:

RESPONSIBILITIES:

- RTL design, verification, synthesis for various lowpower control logic in GPU chips.

- Develop and maintain verification environment at bothfull chip & unit level

- Code/functional coverage analysis

- Responsible for running both RTL & gate levelsimulation

- Develop testing and regression methodologies

- Develop/maintain/enhance environmenttools/scripts/makefiles

MINIMUM REQUIREMENTS:

- BSEE/MSEE/BSCS/MSCS with 3+/5+ years of experience inASIC design or verification

- Proficient in Verilog HDL

- Familiar with logic simulators and debug tools (VCS,NCSIM, Verdi and etc.)

- Working knowledge in C/C++, Makefile

- Must have strong programming skills in one or morescripting languages: TCL, Perl, Python

- Knowledge in one of the below areas is a big plus

+ Display related project experience

+ UVM/VMM experience

+ Low power design/verification experience(Multi-Voltage, power gating,

+ UPF/APF and etc.) ARM based SoC verification experienceAHB/AXI

+ architecture Embedded OS

Position Title:Multi-Media Design/Verification Engineer

Job Description/Qualifications:

Responsibilities

- Define Test plans for multi-media hardware engines atsystem level

- Develop and maintain verification environment.

- Code/functional coverage analysis

- Responsible for running both RTL & gate levelsimulation

- Develop testing and regression methodologies

- Develop/maintain/enhance environmenttools/scripts/makefiles

- Develop/maintain/enhance testing driver for engines.

MINIMUM REQUIREMENTS:

- BSEE/MSEE/BSCS/MSCS with 3+/5+ years of experience inASIC design or verification

- Proficient in Verilog HDL

- Familiar with logic simulators and debug tools (VCS,NCSIM, Verdi and etc.)

- Working knowledge in C/C++, Makefile

- Must have strong programming skills in one or morescripting languages: TCL, Perl, Python

- Hands-on experience on at least one of following fields

+ Audio I/O interface and audio decoding Camera interface(CSI) and

+ image processing Video decoding/encoding and videoprocessing

PositionTitle: Verification/Infrastructure Engineer

Job Description/Qualifications:

Position Summary:

  Verification Engineer for SOC/IP, beingresponsible for front-end verification methodology, test bench andinfrastructure.

RESPONSIBILITIES:

- Participate in the research of verification,methodology to improve automation and  productivity to produce Nvidia newhigh-quality cutting-edge products

- Deploy the advanced verification methodology andinfrastructure of the SOC/IP

- Interface with the global IP teams and CentralVerification groups.

- Technical support

REQUIREMENTS:

- BSEE/MSEE/BSCS/MSCS with 3+ years of experience in ASICverification.

- Needs to have better understanding of Verificationmethodology and concepts

- Should be versatile in any one of the high levelverification flow such as SV,VMM,VERA,OVM, UVM etc as well as knowledge ofindustry standard tools for verification

- Familiar with at least one simulator and debug tools(VCS, NCSIM, Verdi and etc.)

- Working knowledge in C/C++, Makefile

- At least good at one of the script programing lanange erl, Shell, Ruby, Python, etc

- Familiar with Linux Environment

- Design for verification (assertion based designstrategies, code coverage, functional coverage, test plan, gate-levelsimulation, back-annotation etc.) is a plus

- Strong problem solving skills

Best Regards,

Sarah Su

APAC Staffing Team

NVIDIA SHANGHAI

Building 9,No. 399, KeyuanRoad, Zhangjiang Innovation Park, Shanghai, China

Tel +(86 21) 61041139

MP +(86) 15900770601

MSN:  suwei198702@hotmail.com