IC Backend Design Manager

star.zhu@jobic

Location: Shenzhen China/Austin/San Diego/San Jose US

Responsibilities:
        Lead the backend design team to synthesize RTL, implement DFT, clean up the timing, and go through the backend flows to deliver the tape-out.
        Work closely with frontend RTL design team to define chip architecture, clock/reset structure and low power scheme for SOC projects.
        As the key interface between RTL design and backend design team, guarantee the quality of RTL handoff and SDC definition.
        Support design and verification team to verify the layout netlist about functionality, timing and low power implementation.
        Coach and resolve technical issues of team members.

Requirements:
        MSEE with 8+ years or BSEE with 10+ years experience in IC frontend and backend design.
        Demonstrated ability to innovate and make architectural/design trade-offs for balancing performance/power/area of designs.
        Hands-on experience in ASIC/SoC design flows, synthesis, and timing analysis, and taking chips from concept to production is required.
        Proficiency in various EDA design tools and scripting languages (tcl, perl, and etc) is desirable.
        Understanding of timing constraints,CPF/UPF,SI closure,IR/EM analysis and fixes,power analysis and reduction.
        Have successful taped-out design(s) on 40nm and perferably on 28nm.
        Good communications skills and work habits needed to work with a team of different time and locations.
        Frequent travelling to China required.

Compensation: Negotiable

              star.zhu@jobic.cn
              QQ:2634704742

star.zhu@jobic

请大家看好要求中的经验年限哈，如果差得太多就不是很合适，不过也非常感谢关注，欢迎推荐朋友哈。

star.zhu@jobic

最近有朋友咨询了工作地点，这个职位只能是深圳或美国，上海暂不行哈。