Synthesis and Optimization of High-fanout Nets Using Design Compiler

chhwang0123 · 发表于 2010-5-30 21:28:42

good material

knightliu · 发表于 2010-9-18 11:39:29

thanks for sharing

xcykii · 发表于 2010-11-20 18:50:53

thanks a lot

forech · 发表于 2010-12-6 15:38:38

haotie~~~

undieu · 发表于 2011-3-13 22:13:47

谢谢楼主分享，支持

longsimon · 发表于 2011-5-21 11:33:58

thanks

jb7955 · 发表于 2011-10-3 17:51:14

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fly123456 · 发表于 2011-10-3 23:26:13

下来看看啊

merkury · 发表于 2013-4-3 11:01:14

ABSTRACT
High fanout nets, especially resets and gated clock nets, typically result in long synthesis
runtimes, and gives poor results. Fortunately, Design Compiler 2000.11 has added some
improvements that can help designers overcome these problems. This paper will first show some
of the problems caused by high fanout nets. Then, the new commands available in DC 2000.11
for improving the synthesis results of high-fanout nets will be discussed. Last, synthesis results
on test circuits containing some large-fanout nets will be presented.

Ryggeor · 发表于 2016-4-28 01:22:37

thnx!

Synthesis and Optimization of High-fanout Nets Using Design Compiler

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