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[求助] dc 综合时min_capacitance violation

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发表于 2012-4-10 09:37:32 | 显示全部楼层 |阅读模式

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Hi, all,

I learned from the DC User Guide that the min_capacitance is a constraint set on an input or bidirectional port, however, the tool issued a min_capacitance violation when I try to constraint an output port with the following constraint:
set_load -max 10.0 [get_ports OUT_PORT1]
set_load -min 0.01 [get_ports OUT_PORT1]
and with no set_min_capacitance on any ports.

I checked the library and found that the library did have both the max & min capacitance constraint for the output pin of that cell:
max_capacitance: 145
min_capacitance: 10

and this indeed explain why DC issues an -9.99(0.01 - 10) min_capacitance negative slack, however, I couldn't figure out why the library have an min_capacitance constraint on an output pins of a certain cell, and how should I fix this violation. In my opinion, it's invalid to simply use set_load -min 10(or a higher value) [get_ports OUT_PORT1], how should I constraint the load on this output port OUT_PORT1

sincerely 3ks in advance.

BR,
henry
 楼主| 发表于 2012-4-10 20:23:53 | 显示全部楼层
回复 2# zhq415758192


好的,多谢哈.
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