Conexant Systems

jingli888ca

asic Design Manager
Working Place:Chengdu, Sichuan
Job Description / Responsibilities
Lead and manage a team of SoC design & verification engineers to support development of semi-custom CMOS complex SoCs for Video
Convergence and Digital TV product. Responsible for team building, mentoring, directing, and appraising the team & individuals.
Will utilize our standard processes and resource management database. Provide technical direction, set challenging goals, and
formulate realistic objectives focusing on elevating the productivity of the team and the quality and timeliness of expected results.
Adhere to a disciplined design process including quality documentation. Support schedule, resource & task planning, specification process,
design, verification, and technical & project reviews including hands-on involvement. Collaborate with marketing and/or customers to align
product and technology development roadmaps and establish clear performance and functional product requirements. Work with other cross
functional teams in China and overseas such as software, systems, product, and test engineering to specify, design, validate, debug, and
improve the product quality and timeliness to production.
Qualification Required
o MSEE, Ph.D. preferred, + min 8 yrs semiconductor industry technical hands-on experience including background in digital signal processing.

o Min 2 yrs functional and/or project management/leadership experience, excellent track record of successful accomplishments leading &
building teams, can overlap technical hands-on experience.

o General knowledge & experience required for more than one of the following areas : broadcast video & audio standards, MPEG2/H.264,
arm9/AMBA, dsp, verilog, Synopsys/TCL, C/C++, and SystemVerilog.

o Proven capability to predict schedules/results, and can identify risks, assumptions, & dependencies.

o Excellent oral/written English skills

o Can manage entire R&D SoC design flow from eliciting & analyzing requirements, developing device specifications, innovating architectural
solutions, RTL and/or firmware implementation, physical synthesis and timing constraints, and functional and performance test plans and
verification.

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