【高通上海】Digital Design Engineer

raulyrx

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Location   China - Shanghai  

Job Overview   : Take ownership of logic design, documentation and SoC integration Interact with external IP teams/vendors to resolve all technical implementation and integration issues. Work closely with other Design/DV/Validation/SW teams for bug/issue debug, support and chip bring-up Work closely with STA team and PD to for timing closure   
Minimum Qualifications   Familiar with ASIC development, especially logic design, RTL coding, verification, synthesis, timing closure and physical design flow
One or more advantages of the followings are highly desirable: Strong background in digital communication, CPU and networking protocols; hands-on experience in WLAN/Wireless SoC design and good understanding of IEEE802.11 standard; Familiarity in advanced low-power SoC design techniques; Experiences with ARM/DSP, AHB/AXI bus, NoC and peripheral (PCIe/USB) development.
Excellent teamwork, interpersonal and communication skills.
Fluent in Chinese and English both verbal and written.
Scripting/programming skill in C/C++, Tcl, Perl/Csh desired.
Ability to work in stressful situations with tight schedules to meet.

  
Preferred Qualifications   Minimum 2 years of experience with MSEE/CS or 3 years with BSEE/CS. New graduate(MSEE) also accepted   
      
Education Requirements   MS/BS in EE/CS (MS preferred).