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发表于 2006-11-23 09:24:41
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12bit 5M TwoStep CMOS AD Converter(Razavi1992)
A 12-b 5-MSample/s Two-Step CMOS A/D Converter
Behzad Razavi, Member, IEEE, and Bruce A. Wooley, Fellow, IEEE
Abstract
Two-step flash architectures are an effective means
of realizing high-speed, high-resolution analog-to-digital converters
(ADC’S) because they can be implemented without the
need for operational amplifiers having either high gain or a
large output swing. Moreover, with conversion rates approaching
half those of fully parallel designs, such half-flash architectures
provide both a relatively small input capacitance and low
power dissipation. This paper describes the design of a 12-b, 5-
Msample/s A/D converter that is based on a two-step flash
topology and has been integrated in a l-pm CMOS technology.
Configured as a fully differential circuit, the converter performs
a 7-b coarse flash conversion followed by a 6-b fine flash
conversion. Both analog and digital error correction are used
to achieve a resolution of 12 b. The converter dissipates only
200 mW from a single 5-V supply and occupies an area of
2.5 mm x 3.7 mm.
IEEE JOURNAL OF .SOLID-STATE 12JRcuITs, VOL. 27, NO, 12, DECEMBER 1992 |
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