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[资料] 2010-ESD of LDMOS 40V BCD-MD Ker

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发表于 2011-10-5 21:14:28 | 显示全部楼层 |阅读模式

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ESD Protection Design With Lateral DMOS
Transistor in 40-V BCD Technology

Chang-Tzu Wang, Student Member, IEEE, and Ming-Dou Ker, Fellow, IEEE

IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 57, NO. 12, DECEMBER 2010

Abstract—An electrostatic discharge (ESD) protection design
for smart power applications with lateral double-diffused MOS
(LDMOS) transistors is investigated. With the gate-driven and
substrate-triggered circuit techniques, the n-channel LDMOS
can be quickly turned on to protect the output drivers during
an ESD stress event. The proposed gate-driven and substratetriggered
ESD protection circuits have been successfully verified
in a 0.35-μm 5 V/40 V bipolar CMOS DMOS (BCD) process,
which can sustain ESD voltages of 4 kV in human-body-model
(HBM) and 275 V in machine-model (MM) ESD tests. In addition,
the power-rail ESD protection design can also be achieved with
a stacked structure to protect 40-V power pins without a latchup
issue in the smart power integrated circuits.
Index Terms—Bipolar CMOS DMOS (BCD) process, electrostatic
discharge (ESD), ESD protection, latchup.
 楼主| 发表于 2011-10-5 21:15:09 | 显示全部楼层
best...
发表于 2011-10-6 00:09:55 | 显示全部楼层
where is the paper? Thanks
发表于 2011-10-6 09:16:53 | 显示全部楼层
biaotidang
发表于 2011-10-6 10:12:51 | 显示全部楼层
where it is ?
发表于 2011-10-6 11:36:51 | 显示全部楼层
仁兄搞啥呢?
发表于 2011-11-7 12:39:49 | 显示全部楼层
挺好的文章
发表于 2011-11-7 12:42:19 | 显示全部楼层
我来传一下吧

ESD Protection Design With Lateral DMOS Transistor in 40-V BCD Technology.pdf

1.82 MB, 下载次数: 304 , 下载积分: 资产 -2 信元, 下载支出 2 信元

发表于 2011-11-7 21:07:27 | 显示全部楼层
thank you very much~
发表于 2012-4-4 16:17:04 | 显示全部楼层
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