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TABLE OF CONTENTS
About This Manual xv
Section 1
Lexical Elements 1-1
Definition of Lexical Elements 1-3
Character Set 1-5
Replacement Characters 1-6
Identifiers 1-8
Reserved Words 1-9
Comments 1-15
Literals 1-15
Numeric Literals 1-15
Character Literals 1-18
String Literals 1-19
Character and String Literal Differences 1-20
Bit String Literals 1-20
Separators and Delimiters 1-21
Separators 1-21
Delimiters 1-22
Section 2
Expressions 2-1
Definition of Expressions 2-3
General Expression Rules 2-4
Operands (Primaries) 2-6
Names 2-6
Literal 2-7
Aggregates 2-8
Function Calls 2-10
Qualified Expressions 2-10
Type Conversions 2-12
Mentor Graphics VHDL Reference Manual, July 1994 iii
TABLE OF CONTENTS [continued]
Section 2 Expressions [continued]
Allocators 2-13
VHDL Predefined Operators 2-16
Important Notes About Operators 2-17
Miscellaneous Operators 2-18
Multiplying Operators 2-20
Sign 2-22
Adding Operators 2-23
Shift Operators 2-28
Relational Operators 2-28
Predefined Equality and Inequality Operators 2-29
Predefined Ordering Operators 2-30
Logical Operators 2-31
Static Expressions 2-32
Universal Expressions 2-36
Section 3
Naming, Scope, and Visibility 3-1
Naming 3-3
Simple Names 3-4
Selected Names 3-4
Indexed Names 3-8
Slice Names 3-9
Attribute Names 3-10
Scope and Visibility 3-12
Declarative Region 3-12
Scope 3-13
Scope Rules 3-15
Visibility 3-16
Visibility Rules 3-17
use_clause 3-22
Overload Resolution 3-24
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Section 11
Signals 11-1
Signal Concepts 11-4
Drivers 11-4
Guarded Signals 11-5
disconnection_specification 11-8
Multiple Drivers and Resolution Functions 11-10
signal_declaration 11-14
Default Expression 11-15
Signal Assignments 11-16
Sequential Signal Assignments 11-16
Concurrent Signal Assignments 11-17
Delay Concepts 11-19
Delta Delay 11-20
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