VHDL 端口映射请教

shufeng123 · 发表于 2011-9-9 18:28:10

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

您需要登录才可以下载或查看，没有账号？注册

x

port map (
CLKIN => IntSysClkToDcm,
CLKFB => IntSysClk,
DSSEN => Low,
PSINCDEC => Low,
PSEN => Low,
PSCLK => Low,
RST => IntReset,
CLK0 => IntDcmToBufg,
CLK90 => open,
clk180 => open,
CLK270 => open,
CLK2X => IntDcmToBufg2X,
CLK2X180 => open,
CLKDV => open,
CLKFX => open,
CLKFX180 => open,
LOCKED => IntSysClkLocked,
PSDONE => open,
STATUS => open
);

请问 Low和open在这里表示什么意思。谢谢！