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[求助] Analog design signoff checklist

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发表于 2011-8-24 15:29:13 | 显示全部楼层 |阅读模式

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Hello, can anybody share me analog design signoff checklist?

For example, in digital design, it will be

1. functional: test regression passing rate; coverage; etc...
2. Timing: STA; postsim; etc...
...

In analog field, in the real tape-out signoff flow, is there any similar checklist?

Thanks,
发表于 2011-8-25 15:41:47 | 显示全部楼层
it's something you should already know before you became a manager
 楼主| 发表于 2011-8-26 13:22:36 | 显示全部楼层
Can anybody share valuable experience here?

Thanks,
发表于 2011-8-26 14:07:21 | 显示全部楼层
It seems a decent question, and it will help people to follow the right process.

There are two many people who are willing to take short cut, and very few people want to follow the process.
发表于 2011-9-2 03:34:28 | 显示全部楼层
1. postsim at 5 corners and make sure there is some tolerance.
for example 300Mhz 10bit DAC spec, we have to postsim at  350Mhz or higher
 楼主| 发表于 2011-9-8 17:16:20 | 显示全部楼层
Thanks, hugodarwin.

How many testcases do you use for simulation? Only some little sequences which can be put in one test case?
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