PHYSICAL DESIGN TECHNIQUES OF A MULTI-PROTOCOL SERDES PHY

immonster · 发表于 2011-8-24 10:24:49

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

您需要登录才可以下载或查看，没有账号？注册

×

ABSTRACT
In recent years, high-speed serial links (SERDES) have become popular. In the personal computer market, examples include PCI-Express (2.5Gbps) and SATA (1.5-3Gbps). Furthermore, XAUI (3.125Gps) has gained popularity as an ASIC interface. This paper covers a physical layer, multi-protocol IP (PHY) that handles the aforementioned protocols. While the analog physical design was challenging, so too was the digital physical design. Select digital physical design techniques are covered in this paper. The results are a fully functional 130nm PHY and a 90nm PHY.

etopyes8 · 发表于 2011-8-24 17:17:57

Thanks for your information......................
Thanks....................

floatice · 发表于 2011-8-27 10:07:32

have a look!

gaojun927 · 发表于 2011-8-29 13:23:24

好东西啊

accel30 · 发表于 2012-8-24 22:38:13

dingding

accel30 · 发表于 2012-8-24 22:39:25

dingding

nareshreddy · 发表于 2013-7-1 23:31:42

dfdsfdsfdsfsdfsfsfsfsfsd

yesterdaym240 · 发表于 2013-12-22 11:55:32

下来看看

kim_mechane · 发表于 2014-4-9 21:30:52

谢谢分享！~~

木子11 · 发表于 2014-11-21 10:30:18

下来看看。。

账号		自动登录	找回密码
密码			注册

[资料] PHYSICAL DESIGN TECHNIQUES OF A MULTI-PROTOCOL SERDES PHY

马上注册，结交更多好友，享用更多功能，让你轻松玩转社区。

相关帖子

浏览过的版块

站长推荐 /1