Advanced Low Power, Multi-Supply Implementation Techniques

immonster · 发表于 2011-8-24 07:12:14

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ABSTRACT
Designing low-power ASICs in the nanometer era using 65nm and beyond can be complex. With leakage power becoming more dominant as the process technology shrinks, more methods to reduce idle power need to be used. Multi-supply designs with power-down blocks allow for large reductions in leakage power with the trade-off of design complexity. In this paper we will discuss the methodology and flow that was used to implement a multi-supply design with the latest EDA tools: Design Compiler Topographical and IC Compiler.

cihchenlin · 发表于 2011-8-24 08:27:44

支持发好贴

etopyes8 · 发表于 2011-8-24 09:22:37

非常感谢！太好了，我试试！

iceone · 发表于 2011-8-24 09:29:08

感谢！

mtwumtwu · 发表于 2011-8-24 10:04:51

good reference for low power design

原始逻辑 · 发表于 2011-8-24 21:06:00

谢谢分享！

eekevin25 · 发表于 2011-8-26 01:20:18

GOOD DATA, THX...

lujunfeng111 · 发表于 2011-8-27 18:21:47

是篇文章吧。

fwutsairlin · 发表于 2016-5-2 14:22:19

thanks!

fwutsairlin · 发表于 2016-5-7 13:30:21

thanks!

[资料] Advanced Low Power, Multi-Supply Implementation Techniques

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