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LSI上海研发中心正在扩张，目前有很多职业发展机会，欢迎有志之士加入！有意者，请将简历发至：Tracey.zheng@lsi.com 如有任何疑问，请发送邮件至Tracey.zheng@lsi.com或拨打电话021-24191709. 也可加我msn: zql975504@hotmail.com 1.
Sr. Verification Engineer –Shanghai Job Responsibilities Duties will include working with a Verification Team to develop reusable block and system level verification environment using high level verification language to support ASIC development. Review RTL architectural and implementation specifications. Develop test plan, create stimulus drivers, monitors, reference models, scoreboards, protocol checkers to verify function and performance of advanced multiprotocol networking ASICs. Define and develop application tests required to verify ASICs meet functional and performance goals. Define and implement functional coverage plans. Define and implement code coverage plans. Develop testing and regression methodologies for new verification flow. Coordinate test plan implementation and regressions with remote team. Incorporate reusability into all aspects of the verification environment. Develop/maintain/enhance environment tools/scripts/makefiles. LSI Corporation is a leading provider of innovative silicon, systems and software technologies that enable products which seamlessly bring people, information and digital content together. We offer a broad portfolio of capabilities and services including custom and standard product ICs, adapters, systems and software that are trusted by the world's best known brands to power leading solutions in the storage and networking markets. We value the diversity of our people. LSI is an Equal Opportunity Employer. Functional/Industry Knowledge:
Required: - ASIC Design and Verification skills and experience - Knowledge of high level verification languages such as SystemVerilog - Knowledge of data and telecommunication networking - Scripting skills, such as Shell, Perl and TCL - Good written and verbal communication skills Education/Certifications: Required Degree: MS Preferred Major: Electrical Engineering or related discipline
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DIV Engineer (CAD) –Shanghai JOB DESCRIPTION: A DIV engineer’s duties include working within a highly motivated design team to support EDA tools and methodology for custom analog/mixed-signal design of high speed analog integrated circuits. - Communicate effectively within a global business environment (must be proficient in both spoken and written English). - Support EDA tools and design & verification methodology development for custom analog/mixed-signal design of HDD Read Channel ICs. - Support of tools and methodology focused on front-end design (schematic entry and simulation) - Support of tools and methodology focused on back-end design (cell, block and chip layout and verification). - Work with LSI team members in US and Asia to provide interface between EDA tool vendors, internal and external design kit developers and design team members. - Investigate and support development of new EDA tools and methodologies for improvements in IC Circuit Design and Layout productivity. PREFERRED EXPERIENCE: - Preferred degree in Electrical or Electronic Engineering, Software Engineering - BS required, MS preferred - Minimum of 3 years EDA support or IC design/layout experience - Experience required with design and simulation tools such as Cadence Composer, Spectre, AMS, Ultrasim and Analog Artist - Experience required with layout tools such as Vitruoso XL, Hercules DRC and Assura LVS - Expertise in full custom analog and mixed-signal design and layout, design data management tools and methodologies and parasitic extraction is needed - Familiar with Verilog/VHDL - Familiarity with digital and ASIC design flows, power and electro-migration analysis, and IC manufacturing is desirable - Strong communication skills (must be proficient in both spoken and written English) - Proven analytical skills (application of math and physics to solve problems) 3.
ASIC Customer Engineer-Shanghai Job Description - LSI Corporation offers an excellent opportunity to contribute to a team environment and to grow personal career path. You will be working with internal and external customers to develop state of the art IC solutions utilizing LSI's leading edge CMOS cell-based ASIC technologies. You will have responsibility for ASIC designs through all of the key development and implementation phases including RTL analysis, synthesis, design optimization, timing verification, simulation, test insertion, physical design, vector generation, and post-prototype test support. Candidates will have opportunity to work on the latest 40nm/28nm designs. Requirements/Qualifications (Education) Education: BS/MS Electrical, Computer Engineering or Equivalent - Candidates have ONE OR MORE good skill sets of the following areas are highly encouraged to apply: - RTL Analysis/Synthesis/STA: The ideal candidate should have strong skills for the front-end of design - implementation which includes RTL Analysis, Synthesis Strategies, and STA setup for complex ASIC - environments. This would include strategies for power management. - OR Physical Design Implementation: The ideal candidate should be strong in the Physical Design (at least at block level) which includes floor planning, design closure, & STA. Having strong DRC & LVS skills are a plus. - Synopsys Astro/ICC experience a plus. Having Mentor Calibre skills a plus. - OR - Physical Verification: The ideal candidate should have in-depth understanding of transistor level IC fabrication process, familiar with major foundries(TSMC or SMIC) runsets and verification flow, custom layout experience is a plus, successfully done LVS/DRC/ERC/Antenna check for multiple tapeouts is a strong plus. Understanding of DFM is a plus. Calibre experience is a plus. - OR - DFT: The ideal candidate should be strong in all DFT (Design for Test) for all aspects. This would include
- scan/TDF, TestKompress, MEMBIST/BISR, JTAG and etc. Having STA skills is a plus for all aspects of test. Responsible for support / debug of customer designs after delivery of prototypes
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Read Channel Verification Engineer-Shanghai JOB DESCRIPTION: As a member of the Read Channel team, candidate must be willing to work as an extended member of the design team. Duties will include functional verification of Storage read channel mixed-signal IP. Candidate will be expected to contribute to design and development of System Verilog based verification environment and will be responsible for verification closure of block/chip/system level functions for mixed signal based IP. Experience with System Verilog and functional coverage methodologies are required. Must be willing to follow a disciplined verification methodology and to work closely with a multi-location, international design team. Excellent teamwork and communication skills are required. PREFERRED EXPERIENCE: BSEE with 3-5+ years of design and/or verification experience required, MSEE preferred. Required knowledge and skills: - Expertise in System Verilog required - Good understanding of Digital Signal Processing - Good understanding of Analog and Digital Circuits - Very good analytical/debugging skill - Good verbal and written communication skills Desirable skills: - Knowledge of Verilog-AMS, Perl - Knowledge of verification methodologies including functional coverage and constrained random testing - Knowledge of VLSI design flows & DFT - Familiarity of high level programming language - Experience working with globally distributed team management - Experience in Supervising and mentoring Validation engine
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Analog Modeling –Shanghai Job Description A qualified applicant for this position would be responsible to work within a Product Development Team to create behavioral models for Read Channel analog design blocks. Close interaction with the analog and digital design teams is required. Full chip verification of read channel designs which incorporate the analog models is required. Ability to use both digital and analog simulators is required. Must be willing to follow a disciplined design approach and to work closely with a multilocation, international team. Excellent teamwork and communication skills are required Requirements/Qualifications (Education) Minimum of 3 years analog IC design and/or modeling experience in a product development environment Experience with analog and digital Cadence-based simulation tools and SV/AMS modeling language Strong written and verbal communication skills Desired: Read channel application experience 6.
Test Engineer-Shanghai JOB DESCRIPTION: - To support prototype and production releases of new products. Manage debug of test program and hardware and meet product release schedules. - Support test program development for implementing changes in new test methodologies for test coverage improvement. - Pursue Design for Test initiatives to optimize testability and achieve test cost reduction via test time reduction and multiple site test solutions for production release. - Support test chip test development and characterization of new IP used in LSI products. PREFERRED EXPERIENCE: - University graduate students with top scores in GPA - Prior working experiences in the semiconductor industry field, specially in either IDM, Fabless, or Foundry environment - ATE programming skills would be essential - C++ and/or Perl programming skills 7.
Digital IC Design Engineer-Shanghai JOB DESCRIPTION: - Working with an Architecture/Algorithm Development Team to finalize system architecture for optimal implementation of digital signal processing algorithms, including architectural definition and tradeoffs, die size estimation. - Digital logic design, verilog coding, logic synthesis, both RTL and gate level verification, formal verification and static timing analysis. - Perform some transistor level high speed digital integrated circuit design various cells and blocks within custom chips for the hard disk drive industry. Examples of cells and blocks include multiplexors, adders, multipliers, dividers, specific functional macro blocks, - Work very closely with physical design engineers from floorplan through final parasitic extraction to ensure smallest area and highest performance possible. PREFERRED EXPERIENCE: - Communicate effectively within a global business environment (must be proficient in both spoken and written English) - Experience in logic design, synthesis, static timing analysis, and verification - Experience with ASIC EDA tools used in synthesis, simulation, static timing analysis, and formal verification - Experience in developing simulation and verification test benches - Knowledge of Verilog/VHDL design languages - Excellent technical troubleshooting and demonstrated problem solving skills - Must be willing to follow a structured design approach including design for reuse and provide thorough design documentation 8.
Wireless System Architect-Shanghai
（Staff or above level） Job Description This is a Software Systems Applications Engineering position that involves the development and support of reference applications and API/FPI software for our customers. Software development includes creation of applications software for LSI multicore processor configurations using runtime API software, development of data path processing and forwarding software. Software support includes providing technical help on integrating LSI supplied application software with customer systems, LSI supplied SDE (Software Development Environment), reviewing customer application code, creating debugger APIs, simulator maintenance, and contributing to system software API testing. Customer interaction includes both pre-sales activities and issue debugging during development phases. Ability to work well with a variety of people and disciplines is required. Travel to customer sites is expected. Excellent communications skills in both Chinese and English are required Requirements/Qualifications (Education) - Minimum of 5 years software Engineering experience in a data networking or telecom product development. Focused on multicore processor microcode and API device driver with C on RTOS(Linux, VxWorks) - Familiar with network architectures and applications, traffic management and resource management algorithms and function - Knowledge of multicore processor and wireline (ATM, TCP/IP, MPLS, PPP, Gigabit/Fast Ethernet), wireless (NodeB, RNC, GGSN) networking protocols - Familiar with Linux and VxWorks OS - Excellent problem solving and communication skills - Experience with writing documents (data-sheet, application-notes, etc.) Desired: - software/hardware experience in Network Processor and/or multicore processor, e.g. PowerPC - customer support experience - knowledge of interface,e.g. PCI-E bus, GE, RapidIO Education/Certifications Required Degree: BS Preferred Degree: MS Preferred Major: MSEE or MSCS - Project management, DOE, 6Sigma 9.
Sales Account Manager-Shanghai Job Description
Identify and develop new opportunity as well as manage existing business in global accounts,
implement sales strategies to achieve design win and revenue goals;
Aggressively promote LSI networking products to global accounts to drive
strategic design wins and build strategic partnership; Communicate with internal team and customer closely to resolve commercial, technical, quality, and delivery issues to satisfy customer expectation; Establish and maintain good relationship with customer R&D, marketing and procurement team; Get visibility on customer market dynamic and manage booking and billing forecast accordingly. Specific Knowledge/Experience Bachelor Degree at E.E, and M.S. Degree preferred;
Minimum 5 years' working experience in Semiconductor/Telecom sales;
Good communication skill, good at spoken and written English;
Be willing to work aggressively, passionately and diligently to achieve challenging goal; It’s preferred to support Huawei before. 10.
Technical Advisor-Shanghai Job Description
-Responsible for driving frame work as well as key initiatives that are sponsored by Managing Director’s office. Responsible to manage action item(s), closure of various forum meetings that the Managing Director intends to attend or will be attending and interact / work closely with the China Management Team (CMT) and the operations staff. Will be the sounding board for various management presentations for the Managing Director’s office. -Drive Bi-weekly meetings with operations senior management team and ensure bug closure follow ups via Remedy system (Time bound training on Remedy will be provided). Encapsulate the data within framework as per guidance from Managing Director -Driving and proposing, documenting important procedures that would help manage the China intranet for various initiatives and review all paperwork prior to Managing Director’s reviews corporate signatures and legal. -Required to take initiative to manage monthly Managing Director’s newsletter content management, follow through for accuracy of rewards, recognitions & patents disclosure data and arrange / coordinate logistics of visiting Executive staff(s) agenda and travel. -Orchestrate manager(s) / management off-site agendas and action item follow through, along with Managing Director’s budget and help alert topics from China budget. Track various metrics on monthly basis as per guidance from managing director and over time grow to be frameworks expert (for R&D metrics). Requirements/Qualifications (Education) - Minimum 7 year of industry experience is a must with desirable program management experience of supporting either the CEO or Managing Director with a Bachelors or Masters Degree in communication, finance or Marketing. A bachelor in engineering is highly desirable. - Good communication and presentation skills with an expertise in excel and power point is a must. Excellent email etiquettes along with good work ethics, management experience and a flair for program management. Proven track record of managing programs in the past is desirable. | 
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发表于 2011-6-10 16:49:11
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