Low Power High Boost Wideband Gm-C Filters

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LOW POWER ARCHITECTURE AND CIRCUIT TECHNIQUES FOR HIGH BOOST
WIDEBAND GM-C FILTERS
A Thesis
by
MANISHA GAMBHIR
Submitted to the Office of Graduate Studies of
Texas A&M University
in partial fulfillment of the requirements for the degree of
MASTER OF SCIENCE
May 2006

ABSTRACT
Low Power Architecture and Circuit Techniques for High Boost Wideband Gm-C
Filters. (May 2006)
Manisha Gambhir, B.E. Delhi University
Co-Chairs of Advisory Committee: Dr. Edgar Sanchez-Sinencio
Dr. Jose Silva-Martinez
With the current trend towards integration and higher data rates, read channel
design needs to incorporate significant boost for a wider signal bandwidth. This
dissertation explores the analog design problems associated with design of such
‘Equalizing Filter’ (boost filter) for read channel applications.
Specifically, a 330MHz, 5th order Gm-C continuous time lowpass filter with
24dB boost is designed. Existing architectures are found to be unsuitable for low power,
wideband and high boost operation. The proposed solution realizes boosting zeros by
efficiently combining available transfer functions associated with all nodes of cascaded
biquad cells. Further, circuit techniques suitable for high frequency filter design are
elaborated such as: application of the Gilbert cell as a variable transconductor and a new
Common-Mode-Feedback (CMFB) error amplifier that improves common mode
accuracy without compromising on bandwidth or circuit complexity. A prototype is
fabricated in a standard 0.35mm CMOS process. Experimental results show -41dB of
IM3 for 250mV peak to peak swing with 8.6mW/pole of power dissipation.

TABLE OF CONTENTS
CHAPTER Page
I INTRODUCTION..................................................................................................... 1
A. Read Channel Architectures .............................................................................. 2
B. Current Trends in Boost Filter Design .............................................................. 3
C. Organization of the Thesis................................................................................. 4
II FILTER ARCHITECTURE...................................................................................... 6
A. Previous Work on Boost Filter Architectures ................................................... 9
B. A Power Efficient Boost Architecture............................................................... 17
C. Design of Filter’s Parameters ............................................................................ 22
III CIRCUIT IMPLEMENTATION OF OTAS............................................................. 26
A. Core OTA.......................................................................................................... 26
1. Requirements for the Core OTA..................................................................... 26
2. Proposed Implementation of the Core OTA ................................................... 27
3. Design for Linearity ........................................................................................ 30
4. Design Implementation of the Core OTA....................................................... 34
B. Boost OTA......................................................................................................... 37
1. Basic Requirements of the Boost OTA........................................................... 38
2. Possible Implementation of Boost OTA and Previously Reported
Structures......................................................................................................... 38
3. Proposed Implementations of the Boost OTA ................................................ 45
4. Design Implementation of the Boost OTA ..................................................... 49
IV CMFB IMPLEMENTATION................................................................................... 53
A. Common Mode Feedback Scheme.................................................................... 53
B. Conventional CMFB Amplifier......................................................................... 55
C. Proposed CMFB Amplifier and Comparison .................................................... 57
V SIMULATION AND EXPERIMENTAL RESULTS .............................................. 63
A. Simulation Results............................................................................................. 63
B. Layout and Fabrication...................................................................................... 71
C. Experimental Results......................................................................................... 73
vi
CHAPTER Page
VI SUMMARY AND CONCLUSIONS........................................................................ 80
REFERENCES................................................................................................................... 81
VITA…….. ........................................................................................................................ 85

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