上海名企急聘高薪热招职位！

KT咨询-IC电子

以下所有职位请联系顾问：邮箱carrie-hu@kthr.com，MSN :mimmimhu@msn.com

1.美资跨国半导体急聘IC Logic Design Engineer

Job Duties:

Micro-architecture design, RTL coding, simulation and verification of the assigned graphics block; should be also responsible for the synthesis and timing check of the block.

Qualifications ：  （Educations, Experience, etc.):

1.Education:Bachelor degree or above, major in Micro-electronic,EE, CS or related.

2.Experience: Have experience on SOC chip design.

3.Knowledge of/Skills and Abilities·Be familiar with IC logic design flow;·Have good skill in RTL coding, simulation, synthesis and static timing analysis;·Have strong hardware knowledge of computer architecture, Know-how in computer graphics is preferred;·GFX Chip design experience will be a good pls.

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2.欧企跨国集团诚聘 (Senior)  Digital IC Design Engineer （FE Design）

工作地：上海

招聘人数：1

Duties

• IP design and support for digital baseband of cellular phones

• Digital SOC design and integration for chips

Requirements

• B.Sc. degree or above in Semiconductor, Electronics Engineering areas

• 2 years or above design experience in industry

• Good knowledge of design flow including documentation, VHDL/verilog coding, code check, equivalence check, synthesis, timing analysis and RTL simulation.

• Good knowledge of AMBA AHB/AXI protocol is preferred.

• Good knowledge in UPF/IP-XACT based design flow is a big plus.

• Hands on experience in digital IC design EDA tools, such as NCSim/Questasim, Design Compiler, Formality, Primetime etc.

• Good communication skill, will have frequent communication with foreign teams.

• Good written and spoken English is mandatory.

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3.欧企老牌半导体公司诚聘(Senior) Digital IC Design Engineer (Verification)

工作所在地：上海市

招聘人数：1

Job Description:

• IP verification and support for digital baseband of cellular phones

• Digital SOC verification for chips

Requirements

• B.Sc. degree or above in Semiconductor, Electronics Engineering areas

• 2 year or above design experience in industry

• Be familiar with the IP-level and system-level verification methodology

• Be capable of setting up suitable /complete verification environments and have solid skills of creating complete test cases for target design and debugging tough problems

• Good knowledge in low power design and verification is a big plus

• Good knowledge of Verilog/VHDL/Assembly/C programming

• Be familiar with verification languages such as specman, SystemVerilog and PSL, etc

• Good communication skill, will have frequent communication with foreign teams.

• Good written and spoken English is mandatory

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4.美资纳斯达克上市半导体公司急聘senior IC design engineer

工作地：上海

Position Summary

As senior IC design engineer, you will be responsible for the large-scale SOC partion, integration, clock/reset/low power/top control scheme design, whole chip verification, EC, STA and floorplan.

Responsibilities

• Develop the whole chip clock/reset/low power scheme and top level integration
• Prepare whole chip pre-silicon simulation environment and be responsible for whole chip verification
• Working with backend for chip floorplanning
• Be responsible for whole chip STA and EC
• Provide support for production issues
• Prepare documents

Qualifications

Required:

• MSEE preferred
• 3 - 8+ years front end logic design
• Proficiency in Verilog RTL coding and CAD tools for chip design
• Proficiency in large-scale SOC partion, integration, clock/reset/low power/top control scheme design is better
• Proficiency in systemverilog for chip verification is better
• Familiarity with chip verification envirenment setup
• Proficiency for perl, TCL and shell script
• Proficency for STA and EC tools
• Experience for whole chip floorplanning
• Self motivated to finish jobs
  

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5.美资业内技术领先半导体集团诚聘Senior Verification Engineer

Job Responsibilities:

1. Apply specialist skills and knowledge in both hardware and software to perform Pre-Silicon verification tasks for complex Digital Media Processor SOC devices

2. Perform co-verification of processor models and RTL including application software and firmware verification

3. Develop verification strategies; evaluate and integrate cutting edge verification/emulation methodologies into the tool flow

4. Work with other cross functional teams in China and oversea to specify, verify and improve SoC quality and timeliness to production

Job Requirements:

1. 3 years or above experience in ASIC/complex SoC verification

2. Experienced in HDL languages, simulation tools and testbench design.

3. Experienced with C/C++ and script languages programming.

4. Master degree or above in EE or CS.

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6.台资急聘Senior IC design engineer/Project manager

Job Description:

1.Lead front-end design team and coach junior members on design knowledge and way of working. Ensuring the design process meets budget, schedule and project plan goals
2.Work with customer to define detail SoC specification
3.Work with the Architect to design the system bus architecture of SoC, Implement the system bus
4..IP verification and integration
5.System level integration and verification
6.Back-end design related support

Required Skills:
1.MSEE Degree or equivalent
2.Knowledgeable in ASIC design methodology
3.Minimum 5 year experience in the hands-on IC Design
4.Be familiar with ARM process and AHB, AXI protocol.
5.Familiarity of FPGA prototyping

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7.股份公司诚聘IC design engineer

Job Description:
1.Work with customer to define detail SoC specification
2.Work with the Architect to design the system bus architecture of SoC, Implement the system bus
3.IP verification and integration
4.System level integration and verification
5.Back-end design related support

Required Skills:
1.MSEE Degree or equivalent
2.Knowledgeable in ASIC design methodology
3.Minimum1 year experience in the hands-on IC Design
4.Be familiar with ARM process and AHB, AXI protocol.
5.Familiarity of FPGA prototyping

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KT咨询-IC电子

新增职位：
美资纳斯达克上市IC公司急聘IC design engineer
联系顾问邮箱&MSN：digital1@kthr.com
本职位系统编号：12117219375   
工作地点：上海

岗位描述：
Job Duties: As a IC Design engineer, you will work in a highly innovative and motivated design team on next generation demodulator IP/Standalone chip development includes: 1.Preparation and review of functional and design specification.
2.Implementation Spec and micro architecture definition based on the matlab, C or SystemC model.
3.Coding of functionality with VHDL or Verilog.
4.Verification and simulation of needed functionality from block level to top level. 5.Synthesis/STA/Lint Check/Formal Check on given block.
6.Demodulator IP integration in SOC Chip.
7.Validation demodulator IP/Standalone Chip.

职位要求：
Qualifications: (Education, Experience, etc.)
1.Bachelors with 4+ ASIC related experience or masters degree with 2+ related experience.
2.Programming skills in VHDL, Verilog, C/C++ and any script language (such as unix shell, tcl, perl etc)
3.Expertise in logic block designs, simulation, synthesis and static timing analysis. 4.Working knowledge of telecommunication and demodulator is a good plus.
5.Experience with emulator (AXIS, Veloce) is a good plus.
6.Good communication, learning skills. 7.Fluent in spoken and written English.  

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