在网上找到一种方法(下面),试了后不得行,请问怎样设置vcs才能调用xilinx的库及ip core呢,查了半天的资料都为解决
vcs -Mupdate -F srcfiles
where srcfiles is a file that has your verilog source files listed in it. An example srcfile:
your_testbench.v
../chip/your_source1.v
../chip/your_source2.v
c:/Xilinx_8.1/verilog/src/glbl.v //提示这个文件打不开???
-y c:/xilinx/verilog/src/unisims