美资领先芯片公司急招ASIC CAD Engineer（上海）

KT咨询-IC电子

应聘简历请投递:melody-shi@kthr.com，MSN：shixiaoyun11@hotmail.com
本职位系统编号：112161832250   
工作地点：上海


岗位描述：
Description of the Role / Responsibilities:
Participate in the design and implementation of the leading edge ASIC chip. 
Your focus is on design flow Ensure the design methodology correct and improve automation and productivity.
The main flow steps include: FE: Synthesis, Simulation, STA, Design Check and memory compiler etc. BE: Place and Routing, Physical verification, Signal integrity, Power analysis etc. 
Another important part of the job is doing support to FE /BE team.
When they have a real design issue and can’t solved by themselves, you may be asked to jump in for debug and find a solution. Usually you will work with EDA vendors on such case. 
Responsibilities besides support project work also include interfacing with other implementation experts across different development locations, and driving the continuous improvement of advanced implementation methods to Trident digital TV and Set-Top-Box projects teams.

职位要求：
Experience and Skills Required: Essential 
Major in Electronic Engineering or Computer Science. 
Master (or Bachelor 2+ years related experience) 
Strong programming skill with one or more following items( Perl,Tcl, C/C++ etc).  Experience with industry standard development EDA tools and flow. FE engineer: DC, RTL Compiler, PT, Conformal LEC, NC. VCS BE engineer: SOC encounter, Apache Redhawk etc. 
Good written and fluent oral English. 
Good communication skills and team work. Desirable 
Real ASIC project experience as a FE or BE designer is a plus.  

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IChina

Sounds great!

KT咨询-IC电子

美资纳斯达克上市集团急招IC logic Design Engineer(Various Levels)
联系顾问：邮箱和MSN均为digital1@kthr.com
本职位系统编号：12414193278  
工作地点：上海

岗位描述：
Job Duties: IC logic design(Front End)for Video Quality Processing ICs or SOCs(System on Chip), including Video Algorihm development Verilog RTL coding, Syathesis, StatiTiming Analysis, Integration and Verification, FPGA emulation adn C/C++ Modeling.

职位要求：
Qualifications: (Education, Experience, etc.)
1.Education: Major in EE or related, Master or above.
2.Familiar with EE logic design flow, such as RTL coding, simulation and synthesis.
3.can write C mode and RTL to implement algorithms.
4.Working experience preferred, but not a must.
5.Familiar with TV system and video processing algorithms is preferred, but not must. 6.Good personal characteristics as an employee good communication ability and co-work sprit  

本文来源于“胡说IC”