一篇MIT关于低噪声和低抖动VCO和频综的经典书籍

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TABLE OF CONTENTS
CHAPTER 1
Introduction
1.1 Motivation ............................................................................................................... 1
1.2 Thesis Organization................................................................................................. 4
CHAPTER 2
Jitter and Phase Noise in Communication Systems
2.0 Introduction ............................................................................................................. 5
2.1 Timing Signals in Communication Systems ........................................................... 6
2.2 Introduction to Phase-Locked Loops .................................................................... 11
2.3 Timing Jitter and Phase Noise............................................................................... 17
2.3.1 Phase Noise in Oscillators......................................................................... 17
2.3.2 Timing Jitter in Oscillators........................................................................ 20
2.3.3 Phase Noise and Timing Jitter in Buffers and Delay Cells ....................... 22
2.3.4 Phase Noise in Phase-Locked Loops ........................................................ 24
2.3.5 Timing Jitter in Phase-Locked Loops ....................................................... 26
2.3.6 Timing Jitter / Phase Noise Summary....................................................... 29
2.4 System Impact of Timing Errors: Sample Applications ....................................... 31
2.4.1 Clock Synchronization in High Bandwidth Digital I/O Interfaces ........... 32
2.4.2 Clock Drivers for A/D Conversion............................................................ 34
2.5 References ............................................................................................................. 37
CHAPTER 3
RF Frequency Synthesizer Design
3.0 Introduction ........................................................................................................... 41
3.1 RF Transceivers for Wireless Communications .................................................... 41
3.1.1 System Level Impact of Phase Noise and Spurious Tones........................ 44
3.1.2 Requirements for Different Synthesizer Applications .............................. 48
3.2 Frequency Synthesizer Design .............................................................................. 53
3.2.1 Synthesizer Architectures and Components.............................................. 54
3.2.2 Phase Noise and Spurious Tones............................................................... 58
3.3 References ............................................................................................................. 68
CHAPTER 4
Jitter in CMOS Ring Oscillator Delay Cells
4.0 Introduction ........................................................................................................... 70
4.1 Related Analyses of Jitter and Phase Noise in Oscillators.................................... 72
4.2 Individual Delay Cell Timing Jitter....................................................................... 74
4.2.1 Modeling Circuit Noise Induced Timing Jitter ......................................... 78
4.2.2 First Pass: Simplified Analysis.................................................................. 84
4.2.3 Second Pass: Advanced Analysis.............................................................. 89
4.2.4 Third Pass: Complete Analysis ............................................................... 102
4.3 Implications for Low-Jitter Delay Cell Design ................................................... 113
4.4 Conclusions ......................................................................................................... 117
4.5 References ........................................................................................................... 120
CHAPTER 5
Jitter and Phase Noise in CMOS Ring Oscillators and Buffers
5.0 Introduction ......................................................................................................... 122
5.1 Timing Jitter in Ring Oscillator VCOs................................................................ 123
5.1.1 Timing Jitter as a Function of Power Consumption................................ 125
5.1.2 Timing Jitter as a Function of Configuration .......................................... 126
5.1.3 Timing Jitter as a Function of Output Period .......................................... 128
5.1.4 Common Misconceptions in Low-Jitter VCO Design ............................ 129
5.2 Phase Noise ......................................................................................................... 131
5.2.1 Phase Noise / Timing Jitter Relationship ................................................ 134
5.2.2 Phase Noise in Ring Oscillators .............................................................. 136
5.3 Timing Jitter and Phase Noise in Buffers and Delay Chains .............................. 140
5.3.1 Timing Jitter in Buffers ........................................................................... 140
5.3.2 Phase Noise in Buffers ............................................................................ 141
5.4 References ........................................................................................................... 144
CHAPTER 6
Ring Oscillator VCO Design
6.0 Introduction ......................................................................................................... 145
6.1 Basic Delay Cell Design ..................................................................................... 146
6.1.1 Voltage Swing Considerations ................................................................ 148
6.1.2 Gain Considerations ................................................................................ 150
6.1.3 Biasing Considerations............................................................................ 151
6.2 Ring Oscillator VCO Design............................................................................... 154
6.2.1 Oscillator Frequency Limits.................................................................... 155
6.2.2 VCO Center Frequency Variation ........................................................... 157
6.2.3 VCO Control Path Tuning....................................................................... 160
6.2.4 Lower Frequency Ring-Oscillator Design .............................................. 163
6.3 Delay Cell Design and Implementation .............................................................. 164
6.3.1 VCO Tuning ............................................................................................ 167
6.4 References ........................................................................................................... 169
CHAPTER 7
Experimental Results
7.0 Introduction ......................................................................................................... 170
7.1 Ring Oscillator VCO Results .............................................................................. 170
7.2 Jitter and Phase Noise Results............................................................................. 175
7.2.1 Transient Noise Simulations ................................................................... 176
7.2.2 Phase Noise Measurements..................................................................... 182
7.3 References ........................................................................................................... 187
CHAPTER 8
Conclusions ............................................................................................................. 188
Appendix A ............................................................................................................. 191
Autocorrelation Function Analysis for Time-varying Noise Sources
Appendix B .............................................................................................................. 202
Autocorrelation Function Analysis with Interstage Gain Considerations
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x1346

虽然是1998年出版的书了，但里面的理论对于理解低相噪和低抖动的VCO和频综设计还是很有帮忙的。

Daniel10003

呵呵，谢谢楼主

chujn

下来看看，谢谢。

castrader

下载看看了
最好有个题目啊

michael885

看看，学习一下

yuqiumax

回复 1# x1346
炒冷饭

Low-Phase-Noise, Low-Timing-Jitter Design Techniques for
Delay Cell Based VCOs and Frequency Synthesizers
by
Todd Charles Weigandt
S.B. (Massachusetts Institute of Technology) 1991
S.M. (Massachusetts Institute of Technology) 1991
A dissertation submitted in partial satisfaction of the
requirements for the degree of
Doctor of Philosophy
in
Engineering-Electrical Engineering
and Computer Sciences
in the
GRADUATE DIVISION
of the
UNIVERSITY OF CALIFORNIA, BERKELEY
Committee in charge:
Professor Paul R. Gray, Chair
Professor Robert G. Meyer
Professor Paul K. Wright
Spring 1998

whhit264209

thank  you!!!!!!!!!!!!!!!

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感谢楼主分享

newbyron

thank  you!!!!!!!!!!!!!!!