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1. Discrete Wavelet Transform Structures for VLSI Architecture Design 001
Hannu Olkkonen and Juuso T. Olkkonen
2. High Performance Parallel Pipelined Lifting-based VLSI Architectures
for Two-Dimensional Inverse Discrete Wavelet Transform 011
Ibrahim Saeed Koko and Herman Agustiawan
3. Contour-Based Binary Motion Estimation Algorithm and VLSI Design
for MPEG-4 Shape Coding 043
Tsung-Han Tsai, Chia-Pin Chen, and Yu-Nan Pan
4. Memory-Efficient Hardware Architecture of 2-D Dual-Mode Lifting-Based Discrete
Wavelet Transform for JPEG2000 069
Chih-Hsien Hsia and Jen-Shiun Chiang
5. Full HD JPEG XR Encoder Design for Digital Photography Applications 099
Ching-Yen Chien, Sheng-Chieh Huang, Chia-Ho Pan and Liang-Gee Chen
6. The Design of IP Cores in Finite Field for Error Correction 115
Ming-Haw Jing, Jian-Hong Chen, Yan-Haw Chen, Zih-Heng Chen and Yaotsu Chang
7. Scalable and Systolic Gaussian Normal Basis Multipliers
over GF(2m) Using Hankel Matrix-Vector Representation 131
Chiou-Yng Lee
8. High-Speed VLSI Architectures for Turbo Decoders 151
Zhongfeng Wang and Xinming Huang
9. Ultra-High Speed LDPC Code Design and Implementation 175
Jin Sha, Zhongfeng Wang and Minglun Gao
10. A Methodology for Parabolic Synthesis 199
Erik Hertz and Peter Nilsson
11. Fully Systolic FFT Architectures for Giga-sample Applications 221
D. Reisis
12. Radio-Frequency (RF) Beamforming Using Systolic FPGA-based Two
Dimensional (2D) IIR Space-time Filters 247
Arjuna Madanayake and Leonard T. Bruton
13. A VLSI Architecture for Output Probability Computations of HMM-based
Recognition Systems 273
Kazuhiro Nakamura, Masatoshi Yamamoto, Kazuyoshi Takagi and Naofumi Takagi
14. Efficient Built-in Self-Test for Video Coding Cores: A Case Study
on Motion Estimation Computing Array 285
Chun-Lung Hsu, Yu-Sheng Huang and Chen-Kai Chen
15. SOC Design for Speech-to-Speech Translation 297
Shun-Chieh Lin, Jia-Ching Wang, Jhing-Fa Wang, Fan-Min Li and Jer-Hao Hsu
16. A Novel De Bruijn Based MeshTopology for Networks-on-Chip 317
Reza Sabbaghi-Nadooshan, Mehdi Modarressi and Hamid Sarbazi-Azad
17. On the Efficient Design & Synthesis of Differential Clock Distribution Networks 331
Houman Zarrabi, Zeljko Zilic, Yvon Savaria and A. J. Al-Khalili
18. Robust Design and Test of Analog/Mixed-Signal Circuits
in Deeply Scaled CMOS Technologies 353
Guo Yu and Peng Li
19. Nanoelectronic Design Based on a CNT Nano-Architecture 375
Bao Liu
20. A New Technique of Interconnect Effects Equalization by using Negative Group
Delay Active Circuits 409
Blaise Ravelo, André Pérennec and Marc Le Roy
21. Book Embeddings 435
Saïd Bettayeb
22. VLSI Thermal Analysis and Monitoring 441
Ahmed Lakhssassi and Mohammed Bougataya
VLSI.rar
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