上海验证的职位

carrie_kthr

5

SoC Verification Engineer

Job Responsibilities:

Reporting to Verification manager, the candidate is expected to be responsible for following tasks:

1.Apply specialist skills and knowledge in both hardware and software to perform Pre-Silicon verification tasks for complex 40nm Media Processor SOC devices

2.Perform co-verification of processor models and RTL including application software and firmware verification

3.Support the development of multi abstraction/views to enable a thorough Soc verification from unit level to system level

4.Participation in the continued development of verification strategies; evaluate and integrate cutting edge verification/emulation methodologies into the tool flow

5.Work with other cross functional teams in China and oversea to specify, verify and improve SoC quality and timeliness to production

Job Requirements:

1.Proficient and experienced with the C/C++ program.

2.Bachelor degree in Electrical Engineering or related area, MSEE is preferred.

3.3 years or above experience in ASIC/complex SoC verification. Some RTL design/modeling experience is a plus.

4.Experience of SOC designs with embedded processor cores and their integration with other system components including memory subsystems and peripherals.

5.Familiar with Microprocessor and/or DSP instruction sets and how low level driver software integrates into SOC architecture.

6.Familiar with HDL languages, simulation tools and testbench design, low level assembler languages and C, or C++, scripting languages

7.Good English and communication skills; will need frequent communication with foreign team.

8.Experience related to stream processing, video/audio decoding, process technology and reliability qualification is a plus

9. Experience with a high-level verification language such as System Verilog or Specman is preferred

Verification Engineer

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Responsibilities:

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This individual will be a member of methodology/verification team.

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Responsibilities will include developing verification environment; developing test plans for and verifying the function of ASIC; hands-on implementation work for every aspect of ASIC verification, working closely with the system group, architects, design and verification teams. The successful candidate should have experience going through at least one complete and successful ASIC design/verification cycle from architecting and creating ASIC test environment to full completion of the verification work. The candidate also needs to have a full understanding of design using Verilog and working experience with SystemC. A strong communication skill in both Chinese and English is required.

Qualifications:

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2+ years of ASIC verification experience, complex SOC verification experence is preferred

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Strong programming skills in C/C++

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Knowledgeable in Verilog/Verilog-PLI/SystemC/SystemVerilog

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Responsible for implementation of verification environment and generation of high quality test cases.

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BS/MS EE, CE or CS

Senior / Design verification Engineer

Job Description and Responsibilities:

-Responsible for logic verification of memory products.

-Generate test plan and test vectors according to product spec.

-Generate Random enginee and coverage group by system verilog/script.

-Responsible for the developments of specified flash memory products or embedded flash IPs.

-Support the design kits include verilog model sythesis lib generation and of embedded flash IPs

Key Competency Requirements:

-Basic IC design and verification methodology.

-Experience in memeory macro modeling, verilog simulation or synthesis lib generation

-Knowledge of non-volatile memory circuits and architecture is a definite advantage.

-Tools used may include Verilog, HSPICE/HSIM, Cadence Design Entry, Synopsys synthesis tools, P&R tools, IC layout tools, or other equivalent tools

Education and Experience Required:

-Bachelor degree or above in EE

-3+years logic verification experience is preferred.

-Preferred- Memory (especial Flash memory) knowledge.

-Advanced verification methodology knowledge is preferred.

Job Title: Senior Validation and Application Engineer

Department: Program and Platform Engineering

Description:

As a member of our test team, this individual would be responsible working with designers and architects to plan and execute verification and validation of ASIC and IP blocks.

Duties and Responsibilities:
- Responsible for understanding the expected functionality of logic blocks

- Developing test FW and software
- Debug hardware and software issue
- Implement validation automation system
- Maintain proper documentation bugs or issues

Qualifications:

- Prefer Master in EE or Computer Science with at least three years of experience
- Minimum required skills: Firmware, ASIC, Hardware, ARM or DSP processors, device drivers
- Coding skill in C/C++, Assembly, scripting languages
- In-depth knowledge of SoC/ASIC verification flow with emphasis in coverage driven verification/validation methodology.
- Depth and breadth of knowledge on industry standard IO protocols: UART, SPI, I2C, I2S, flash memories, SRAM and DRAM.
- Good communication skills

Carrie
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Shanghai Key-Team Human Resources Consulting Co.,Ltd
Add: Room 1310, Huashen building , No.1085 Pudong South Road, Shanghai China
Tel: (86)021-61023600-25
Mobile86)139 1607 0643
Email: carrie-hu@kthr.com  
MSN:mimmimhu@msn.com
http://www.kthr.com
Profile:http://cn.linkedin.com/pub/carrie-hu/27/971/74b

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