CC Error - Module 'NOR2X0' is not defined. (MWNL-297)

phuang · 发表于 2010-12-16 10:17:25

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Hi everyone,

I met an error when I run ICC with the instruction "import_design", shown as following:

icc_shell> import_designs -format verilog -top ChipTop -cel ChipTop_floorplan {./results/compile.v}
Loading db file '/iggroup/home/phuang/Synopsys_Curriculu/low_power_methodology/lpmm_labs/lpmm_lab3/models/saed90nm_typ_ht_pg.db'
Warning: Conflict unit found: MW tech file capacitance unit is pF; Main Library capacitance unit is fF. (IFS-007)
Warning: Conflict unit found: MW tech file resistance unit is kOhm; Main Library resistance unit is MOhm. (IFS-007)
Loading db file '/iggroup/home/phuang/Synopsys_Curriculu/low_power_methodology/lpmm_labs/lpmm_lab3/models/saed90nm_min_pg.db'
Loading db file '/iggroup/home/phuang/Synopsys_Curriculu/low_power_methodology/lpmm_labs/lpmm_lab3/models/saed90nm_max_pg.db'
Loading db file '/CAD/Synopsys/ICC_vC-2009.06-SP4/libraries/syn/gtech.db'
Loading db file '/CAD/Synopsys/ICC_vC-2009.06-SP4/libraries/syn/standard.sldb'

***** Verilog HDL translation! *****

***** Start Pass 1 *****
Begin loading DB for bus info.
End of loading DB for bus info.Elapsed = 0:00:00, CPU = 0:00:00
Warning: All isolation_upf and retention_upf pragmas are ignored. (VER-282)

***** Pass 1 Complete *****
Elapsed = 0:00:01, CPU = 0:00:00

***** Verilog HDL translation! *****

***** Start Pass 2 *****
Error: Module 'NOR2X0' is not defined. (MWNL-297)
hdlCleanupDBLibrary:
Error: Verilog parser cannot parse the /iggroup/home/phuang/Synopsys_Curriculu/low_power_methodology/lpmm_labs/lpmm_lab3/results/compile.v source file. (MWNL-047)
No such file or directory
Error: Current design is not defined. (UID-4)
0
icc_shell>

Following the the manual of MWNL-297, I checked my netlist file and the FRAM reference library, both of them contain the module 'NOR2X0' .

So how to deal with the problem? I am puzzled.

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looking forward to your advice. Thanks a lot!