上海KT 12月模拟类岗位

KT人才

NO .90  拟设计部门经理     硕士，五年以上的工作经验，要有AC-DC design的设计背景

职位描叙：
§         管理4－5名工程师的设计部，向工程/研发副总汇报
§         参与新项目的市场调查，进行技术可行性研究，对产品立项提出审察意见
§         担当或指定项目经理，组建项目研发团队，并保证项目按进度进行。
§         监控并指导项目执行过程，参与产品定义，系统级设计并指导电路和版图设计，确保产品开发的各个环节严格按流程进行。
§         每周向工程/研发副总提交所负责产品的开发进程报告


NO.90   模拟设计工程师   硕士三年以上，模拟跟混合IC开发经验 主要是power design
职位描叙：
§         定义，设计模拟电路或混合信号电源管理IC，负责模块和整体芯片的仿真和验证
§         使用CADENCE或MENTOR GRAPHICS设计工具进行模拟电路设计，仿真。
§         设计版图布局，并协助版图工程师进行版图设计，确保版图达到电路设计的要求
§         计划实验室评估计划，并使用实验室测试设备对工程样片进行测试评估。
§         撰写设计，测试报告
§         协助测试工程师进行中测和成测规范的定义和程序开发，验证


NO .152　　Senior Analog Design Engineer——AMS, Shanghai  本科五年以上，硕士两年以上
Job responsibilities:
§         ·         Define and implement Analog or Mixed Signal development activities from specification, architecture, design, verification to physical validation for high quality circuits or IPs in mobile multimedia and power management products
§         ·         Interface with other functional teams like back-end, validation or application for successful silicon from concept to production on schedule
§         ·         Work with product development team to create new IP architectures and circuits, provide technical coordination, ensure robust delivery of projects
§         ·         Coach analog design team members and help to develop technical staff
§         ·         Work with other team members to build up design competence and improve way of working



NO .96   Product   engineer

§         Hands-on experience with analog IC lab verification and be familiar with lab equipments
Board-level op amp design experience – 2yrs+
Pspice simulation of analog circuits – 2yrs+
Should have ability to write Pspice models.
Education >= Bachelors in EE
Good English communication skill

NO .82  　senior　analog　design　engineer  4年以上的工作经验

Responsibility：
§         1. implement  critical analog circuitries,such as  charge pump ,bandgap ,reference voltage/current ,ADC/DAC etc, for  memory operation
§         2. perform transistor level simulation for functionality ,performance and optmization
§         3. perform block level and full chip level simulation using mixe-singnal simulation
§         4. define ,design and verify architecture for embedded non-volatile  memoties
§         5.I/O design experence a plus
§         6. other duties as and when required


NO .16     西安    power management   IC design engineer
硕士两年以上的工作经验，最好是power ic design 的   英语要好

Description
Design Mixed Signal Integrated Circuits (ADC, bandgap reference, PLL and digital logics) for power management IC.
Verify Mixed Signal Integrated Circuits. Perform architecture studies using CAD software. Evaluate the product over application conditions to ensure that is meets customer specifications.
Assist the product engineer in Limit Setting for Characterization and volume manufacturing.

NO .163    Senior  ic  design engineer     focus on  Signal conditioning, processing, like high performance amplifier, ADC, DAC, PLL 下面的JD仅供参考 ， 职位是在北京
2            Job description:
§         ·        Analog IC circuit design, simulation and verification
§         ·        Design analog products and blocks such as high current or high capacitive load output drivers, operational amplifier, comparator, voltage reference, oscillator, error amplifier, voltage regulator etc.
§         ·        IC layout including floor planning, DRC, LVS, and LPE
§         ·        Work with application and testing engineers to define optimal characterization and testing solution
§         ·        Work with product definers and product engineers in full product development flow

NO .25   Staff/Senior / Design Engineer ( Memory)

Job Description and Responsibilities:
-Responsible for analog and logic block design in the memory products.
-Responsible for the developments of non-volatile memory products and flash macros.

Key Competency Requirements:
-Technical knowledge in IC design methodology.
-Knowledge of non-volatile memory, analog design, noise analysis, low power/leakage, high-speed memory design a definite advantage.
-Tools used may include HSPICE/HSIM, Cadence Design Entry, IC layout tools, or other equivalent tools.

Education and Experience Required:
-Education Required: MS. EE or Ph.D. EE required;
-Experience Required: 3+ years memory or analog design experience;
-Advantageous with experiences or exposures to the following: as project or team leader, test, package/assembly design and digital/layout design.



NO .25   . Senior Design Engineer ( PCM)     

Job Description and Responsibilities:
-Circuit design for phase change memory development.

Key Competency Requirements:
-Technical knowledge in IC design methodology;
-Experience of Phase change memory/ non-volatile / flash memory a definite advantage;
-Knowledge of Verilog, Synopsys synthesis / simulation tools, HSPICE, Cadence Design Entry, IC layout tools, Dracula, Silicon Ensemble or other equivalent tools.

Education and Experience Required:
-MS degree or above;
-With more than 3 years of design experience;
-Preferred:Some Analog/Layout design related experience and some Process/Technology related experience



NO .25   Senior / Design Engineer ( Flash IP)

Job Description and Responsibilities:
-Design and maintain Flash memory IPs;
-Support user / customer to use SST embedded flash IP.

Key Competency Requirements:
-Technical knowledge in IC design methodology;
-Experience of non-volatile / flash memory, MCU analog IP design a definite advantage;
-Knowledge of Verilog, Synopsys synthesis / simulation tools, HSPICE, Cadence Design Entry, IC layout tools, Dracula, Silicon Ensemble or other equivalent tools.

Education and Experience Required:
-Bachelor degree or above in EE;
-More than 2 years of analog design experience;
-Preferred:Some Analog/Layout design related experience; Some Process/Technology related experience.

NO .25   Senior / Design verification Engineer

Job Description and Responsibilities:
-Responsible for logic verification of memory products.
-Generate test plan and test vectors according to product spec.
-Generate Random enginee and coverage group by system verilog/script.
-Responsible for the developments of specified flash memory products or embedded flash IPs.
-Support the design kits include verilog model sythesis lib generation and of embedded flash Ips

Key Competency Requirements:
-Basic IC design and verification methodology.
-Experience in memeory macro modeling, verilog simulation or synthesis lib generation
-Knowledge of non-volatile memory circuits and architecture is a definite advantage.
-Tools used may include Verilog, HSPICE/HSIM, Cadence Design Entry, Synopsys synthesis tools, P&R tools, IC layout tools, or other equivalent tools

Education and Experience Required:
-Bachelor degree or above in EE
-3+years logic verification experience is preferred.
-Preferred- Memory (especial Flash memory) knowledge.
-Advanced verification methodology knowledge is preferred.


NO .82  版图设计工程师         工作年限： 2年以上  公司地点：漕河泾
职位描述：
完成高级模拟混合信号以及闪存芯片的集成电路掩膜设计；进行芯片布局规划以优化芯片尺寸和电路功能；进行电路规划和构造，包括关键信号，电源走线以及模拟布局方针等；进行布局的DRC和LVS验证。

要求：
本科及以上学历；至少2年使用Cadence Virtuoso XL，Calibre DRC进行芯片设计的经验；熟练芯片设计布局，能够熟练使用CAD工具，例如： DREC，LVS，并且使用其进行编程；有较强的解决问题的能力；具有团队精神。


NO .122    Senior RFIC Layout Engineer:            
Primary Responsibilities:                公司地点：张江
·    Schedule estimation, block-level layout and verification, top level routing, and tapeout activities.
·    Strong communication skills and the ability to lead a team of layout designers.
·    We are looking for people with versatility, initiative and the ability to adapt to a dynamic startup environment.
Required Skills
·    BS Degree or equivalent
·    Five or more years experience in analog and digital IC layout with experience in top-level assembly and tapeout activities
·    Solid understanding of design rules and verification for fine-geometry CMOS processes
·    Proficiency in block level floor planning, device matching, minimization of parasitics, and isolation techniques
·    Direct experience in RF layout and knowledge of semiconductor devices and fabrication principles strongly desired
·    Experience with Cadence layout and verification tools and proficiency in a Unix workstation environment
·    Experience with PCB layout tools, lab test and measurement equipment, VBA programming or LabView programming beneficial
NO .122    RFIC  Layout Engineer:
Primary Responsibilities:                           张江
·    Block-level layout and verification
·    Strong communication skills
·    We are looking for people with versatility, initiative and the ability to adapt to a dynamic startup environment.
Required Skills
·    BS Degree or equivalent
·    1-5 years of analog and digital IC layout experience
·    Solid understanding of design rules and verification for fine-geometry CMOS processes
·    Proficiency in block level floor planning, device matching, minimization of parasitics, and isolation techniques
·    Direct experience in RF layout and knowledge of semiconductor devices and fabrication principles strongly desired
·    Experience with Cadence layout and verification tools and proficiency in a Unix workstation environment
·    Experience with PCB layout tools, lab test and measurement equipment, VBA programming or LabView programming beneficial
NO .00  版图设计工程师    本科三年以上，微电子、信息工程专业
主要职位：
   根据项目要求，完成版图设计和TAPEOUT，以保证部门计划和项目的顺利进行
主要职责
1、规划计划
1.1制订个人年度工作计划。
2、 制度建设及执行
2.1起草版图设计规范；
2.2组织起草MASKFRAME的相关规范；
2.3遵守执行公司各类通用规章制度，遵守执行工作相关制度、流程和规范。
3、 版图设计和制作
3.1根据项目要求，完成版图结构定义，制定版图设计方案和计划；
3.2进行版图设计和排版；
3.3进行版图软件验证；
3.4实施版图TAPEOUT；
3.5实施JDV（job deck view）检查；
3.6协调外包制版工作；
3.7编写版图设计说明书，并及时归档；
3.8跟踪收集各技术代的相关版图设计规则信息；
3.9参与学术交流，撰写学术论文，申请专利和版图保护

NO .152   版图设计       本科  三年以上

Key Areas of Responsibility:

1. Develops the policy for a small but spearheading technology.
2. Determines, in consultation with management, the team’s objectives and lays down the division of responsibilities.
3. Co-ensures that there is appropriate personnel management as regards to recruitment and selection, manpower, remuneration, education and training and possible secondment.
4. Maintains internal business processes and ensures that there is an appropriate quality level.
5. Monitors projects via project management principles, where necessary by guiding Project Leaders.


NO .96    音频功放 研发类  硕士应届毕业生以上，职位不限

NO .16  application engineer     西安
硕士两年以上相关经验，英文要好
Description
Be responsible for power management product and customer applications in AC/DC and DC/DC power supply an power modules in telecom, base station and consumer areas
Develop system applications, demo designs and customer sub-power system with advanced and innovative power ICs
Provide best-in-class in-depth technical support for top tier customer biz development  and interface with customers

NO .16  Application Engineer for ISO-BDC    北京
Qualification:
?         MSEE/PHD in Electrical Engineering or Computer Engineering. 2 year+ experience for MSEE and 1 year+ for PHD.
?         Experience in any of below is a plus.
?         PCB schematic and layout experience
?         Understand basic circuit theory and basic analog circuit design theory
?         Understand IC evaluation and performance specification measurement theory and technique
?         Proven track record of innovative initiatives in previous designs
?         Self motivating, good team player and good communication skill
?         Good English speaking and writing skill.
?         Flexibility to have oversea and/or domestic travels
?         Familiar with safety certification and experience in iCoupler (ADuMxxxx) products is preferred.

NO .16  Segment System Applications Specialist (Application Engineer)
I&I Segment – Instrumentation Focus       上海 （High-Speed/RF system design experience with ideally 8+ years in a system design role in DSO/Spectrum Analyzer/RF Meter applications
）
Job Description:
Be part of the Worldwide Segment Applications Team with special focus on China
Be responsible for understanding System Specifications, Requirements and Partitioning in Instrumentation application spaces with particular emphasis on High Speed and RF Instrumentation applications.
Develop relationships with technology leaders and system architects at key selected Instrumentation accounts in China. Be seen at these accounts as a Key Technologist and Expert in high-speed and RF Instrumentation applications
Ensure that the requirements and challenges of these Chinese customers are included in any product definition or technology requirements for the Instrumentation segment
Be responsible for the development of system level solutions such as Reference Designs, Demo Systems, Proof of Concepts Application and Segment Level CftLs. Particular emphasis should be placed on China customers but, in general, solutions should not be exclusive to China
Be responsible for defining the Whole Product Solution (required ecoSystem, development platforms, solution examples, software requirements, etc) that is necessary to win in assigned Instrumentation application areas.
Support the Regional Segment System Apps Engineers at key selected accounts, especially with regard to system level architecture and early engagement design-in activities
Provide Expert Applications support for the Regional Segment System Apps Engineers and FAEs for high-speed and RF Instrumentation applications
This role is primarily lab-based and complements the customer-facing Regional Segment System Apps role
NO . 158     高级系统应用工程师    Senior system application engineer
Job description:
- Test and characterize the advanced RFIC products at the board level.
- Support design team in problem investigations, identification and solutions
- Provide RF performance and calibration services
Qualifications:
- Master of Science in Electrical Engineering (BSEE) with 3+ year working experience focused on RF product application and RF system testing.
- Experience in RF system testing (the testing of Receiver or the testing of block such as: LNA, Mixer, VCO, PLL, etc); include bring-up, trouble-shooting, test and characterization. PCB layout experience is preferable.
- Experience in RF systems / platform development and prototyping, solid programming skills are required, such as Visual C, LabView or equivalent
- Experience in realtime, live RF testing and system calibrations
- It is plug if there is experience at tuner such as: Tuner RF testing or Tuner hardware application
- Self-motivated team player and able to work with minimum supervision

NO . 158   射频芯片验证工程师
Job Description:
1、RFIC design validation engineer
2、test and validate RFIC silicon
3、support design team in problem investigations, identification and solutions
4、provide RF performance and calibration services
5、provide competition and benchmarking analysis
Skill Description :
1、experience in CMOS RF wireless communication design validation
2、experience in RF systems / platform development and prototyping
3、experience in realtime, live RF testing and system calibrations
4、experience in RF silicon evaluation and benchmarking
Candidate Requirements: 　　　
1、Master Degree in Electronics Engineering with minimum 2 years of related experience.
2、Self-motivated team player and able to work with minimum supervision.

NO . 158  模拟芯片设计工程师   Analog IC design engineer
Job description:
- Design RFICs in CMOS technology for wireless communication products.
- Perform IC definition, design, simulation, post silicon characterization and test development.
Qualifications:
- Master Degree in Electronics Engineering with minimum 1 years of related experience.
-Experience in CMOS analog mixed signal IC design includes analog filter, variable gain amplifiers, DC offset cancellation, process and temperature calibration, bandgap, etc. ESD and power management unit design knowledge is an added advantage.
- Solid knowledge of EDA tools. Cadence design environment is preferred.
-Experience with CMOS analog IC layout.
- Experience in Lab testing and characterization.
- Experience with Production testing for mass production of analog products
- Self-motivated team player and able to work with minimum supervision.

NO . 158   产品测试工程师   Product Test Engineer
Job Description:
1、Test engineering, mainly focus on RFIC products
2、Work with design and applications, make recommendation on test strategy. (DFT,DFM)
3、Define test methodology and write test specification
4、Develop test program together with test hardware for RFIC.
5、Optimize test program and hardware to improve test coverage, yield and test time cost down.
6、Responsible for engineering work till production.
Skill Description:
1、Experienced on IC test development and production.
2、Good understanding on RFIC products, familiar RF test techniques.
3、Experience in test development on ATE, mix-signal working background is must.
4、Team player and good communication skill.
Candidate Requirements
1、BSEE or MSEE with minimum 2 years of related experience.
2、Self-motivated team player and able to work with minimum supervision.

NO . 158    RFIC test engineer:  
Job Description:
1、RFIC test engineer
2、test and validate RFIC silicon
3、support design team in problem investigations, identification and solutions
4、provide competition and benchmarking analysis
Skill Description:
1、experience in RF system design and analysis.
2、experience in RF system testing, can use the RF test equipment such as RF signal source, spectrum analyzer, vector network analyzer, etc.  
3、experienced on RF & AMS IC test development
Candidate Requirements: 　　　
1、BS/MS Degree in Electronics Engineering with minimum 1 years of related experience.
2、Self-motivated team player and able to work with minimum supervision.


NO .122    Product Applications Engineer – Shenzhen
The Opportunity:
looking for an experienced RF engineer with extensive laboratory knowledge. You will be responsible for RF debugging of customer designs, design of evaluation platforms, generation of performance procedures, application notes and other product related documentation.  You will program software including driver integration and writing ATEs for platform characterization/debug is highly desired. You must have the ability to clearly communicate with customers and other departments, and have extensive knowledge of tuners and demodulators in both system and applications level. Previous experience of bringing product into high volume production is a plus.  Other job duties include:
- Defining and generating reference design boards. (Design, debug, and characterize
reference designs. SW driver integration)
- Supporting strategic partners/alpha customers by reviewing and debugging
reference designs. This sometimes requires travel to partners/customers for
direct on-site support
- Generating testing procedures and test reports
- Developing datasheets and application notes for internal and external uses
- Working with marketing and generate market competitive analysis
- Assisting marketing implementing the product roll-out plan

Experience and Education Necessary:
- BSEE with 7 years or MSEE with 5 years of hardware development and a minimum of 2 years experience in RF semiconductor applications engineering.
- Tuner/demodulator hardware/software experience and familiarity with high volume consumer oriented RF IC’s.
- Strong PCB knowledge including schematic design and layout. Hands-on skills of PCBs including prototyping and optimization of board design.
- Strong RF debugging/troubleshooting capability
- Knowledge of RF systems engineering: Extensive knowledge of tuner/demod/decoder system interactions
- Test equipment operation: Spectrum analyzers, network analyzers, signal generators
- Must be able to communicate clearly and have good interface skills.
- Needs to generate test plans/procedures, product documentation, and application notes.
- Simulation of RF circuits using ADS, Eagleware or similar tools.

以上岗位如有兴趣请联系：
Hamy  Wang
Research Center
======================
Key-Team Human Resources Consulting Co.,Ltd
Tel:  021-61023600-13
Mobile: 13512136297
Email :  analog@kthr.com   
MSN :  hamy_wang@hotmail.com
Public Profile:http://cn.linkedin.com/pub/hamy-wang/26/437/178
http://www.kthr.com

cicixu

ddddddd

王尧888

飞铲感谢您

ra3d

飞铲感谢您

iver61

飞铲感谢您