数字相关——上海北京opportunities

carrie_kthr

目前很多sinor junior的设计职位 3-7年的.  欢迎大家联系询问具体信息

Sr. IC Logic Design Engineer

Job Duties:
(Moving toward a central SoC-Infra/CPU team to support both STB/DTV development and due to the urgent request from Kronos project, need to move SoC-infra expansion quickly. We need to add four person for the following –
(1)        One senior to own PMAN builder
(2)        One senior to own PMAN simulation
(3)        One senior to own DDR3-Phy/PCTL of C40 and Kronos project
(4)        One senior to own overall IP2055 for Kronos project)
Duty: Participate in SOC logic design, simulation, Synthesis and timing analysis. Chip bring up, support Validation Team, SW and FAE team. Field support Customer at special urgent case.

Qualifications: (Education, Experience, etc.)
1. Education: Major in EE or related, Master or above;
2. Familiar with Verilog and VHDL;                                                               
3. Knowledge of computer architecture, ASIC design flow, HW system;
4. Three years of experience of IC logic design for peripheral interface;                                                                          
5. Good personal characteristics as an employee, good communication ability and co-work sprit; 6. Good communication and interpersonal skills.

2
VLSI Sr SOC Engineer

Job Responsibilities:
Reporting to the SoC manager, the candidate is expected to be responsible for following tasks:
1.Develop state of art 45nm complex media processor SoC products with embedded cpu, memory controller, media processor and various mixed signal IPs
2.Work with other cross functional teams in China and overseas to specify, design, validate and improve SoC quality and timeliness to production
3.Participate in SoC architecture definition, SoC integration and verification
4.Create and optimize DFT structure, STA constraints, pad & package selection
5.Work with physical design team to ensure a successfully implementation until tape-out by performing RTL rule check, LEC and power analysis etc

Job Requirements:
1.Bachelor degree in Electrical Engineering or related area, MSEE is preferred.
2.3 years or above experience in ASIC/complex SoC design or verification.
3.Familiar with hardware description languages such as Verilog, System Verilog and VHDL
4.Knowledge of script language, such as Tcl, Python, Perl are required
5.Familiar with IC design & verification tool flow with hands-on experience in DC, PT, NC-Sim and/or Spyglass
6.Good English and communication skills; will need frequent communication with foreign team.
7.Experience related to video/audio decoding, process technology and reliability qualification is a plus

3
IP Development Engineer

Job Duties:
Digital design engineer  working on security and/or transport design modules.  Work will include verilog digital design, verification and validation duties.   Digital design duties will include coding in verilog language, synthesizing verilog to gates and FGPA targets using synopsys and cadence tool sets, designing and inserting DFT test support functions as needed, running integrity checks for the system (lint/cdc/logical equivalence) .  Verification duties will include development of testbenches written in verilog, system verilog or OVM test language, development, analyses optimization of testcases.  Duties will also include integration and support functions to ensure proper integration of the IP into the target SoC device.   Duties will also include execution and support for validation activities to ensure proper operation of the function within the SoC after silicon comes back.

Qualifications: (Education, Experience, etc.)
MSEE with 1 to 4 years of related experience

4
IP Development Team Lead

Job Duties:
1. Lead security/transport/network development team in Shanghai to augment and offload Austin/Haifa development team. Duties will include the integration of the transport and security IP into the STB and DTV SOCs and provide first level of support for the IP. Duties will also include participating in the development and support of the existing and new modules for functions such as digital design, verification, validation .
2. The team lead/manager will lead a small team of people working with the Austin and Haifa teams and be responsible for the day to day activity of the team members providing technical and managerial level direction, coordinating interaction with other team members in Austin and Haifa, driving and managing integration and support activities with the SOC team for the related IPs.

Qualifications: (Education, Experience, etc.)
BSEE with 10 years experience or MSEE with 7 years related experience.

5
SoC Verification Engineer

Job Responsibilities:
Reporting to Verification manager, the candidate is expected to be responsible for following tasks:
1.Apply specialist skills and knowledge in both hardware and software to perform Pre-Silicon verification tasks for complex 40nm Media Processor SOC devices
2.Perform co-verification of processor models and RTL including application software and firmware verification
3.Support the development of multi abstraction/views to enable a thorough Soc verification from unit level to system level
4.Participation in the continued development of verification strategies; evaluate and integrate cutting edge verification/emulation methodologies into the tool flow
5.Work with other cross functional teams in China and oversea to specify, verify and improve SoC quality and timeliness to production

Job Requirements:
1.Proficient and experienced with the C/C++ program.
2.Bachelor degree in Electrical Engineering or related area, MSEE is preferred.
3.3 years or above experience in ASIC/complex SoC verification. Some RTL design/modeling experience is a plus.
4.Experience of SOC designs with embedded processor cores and their integration with other system components including memory subsystems and peripherals.
5.Familiar with Microprocessor and/or DSP instruction sets and how low level driver software integrates into SOC architecture.
6.Familiar with HDL languages, simulation tools and testbench design, low level assembler languages and C, or C++, scripting languages
7.Good English and communication skills; will need frequent communication with foreign team.
8.Experience related to stream processing, video/audio decoding, process technology and reliability qualification is a plus
9. Experience with a high-level verification language such as System Verilog or Specman is preferred

6
IC Architecture Engineer

Job Duties:
Do C-modeling, test plan and hardware verification of the assigned graphics blocks.

QualificationsEducation, Experience, etc.)
1.Education: Master degree or above, major in CS,EE, or related.
2.Experience: Experience on hardware c-modeling, 3D graphics driver, and/or 3D graphics application.
3.Knowledge of/Skills and AbilitiesBe familiar with hardware c-modeling;Good skill in C/C++ coding;Knowledge of computer graphics, OpenGL, and/or other 3D standards;Knowledge of computer architecture and logic design is good plus

7
Integration Circuit Engineer × 2
Job Duties:
1.Be an active member of the Development organization.--Support product manager on IC/Macro spec definition;--Oversee the integration design flow;--Leading design review meetings;--Circuit / Process consultancy;
2.Design IC's Power Ground system;
3.Design IC's Clock system;
4.Define the IC's ESD/Latch-up design rule;
5.Oversee and Guide-line Layout engineer on Macro integration, noise immunity and Verification activities;
6.Working with Layout engineer on Timing closer;
7.IC's Circuit database management;
8.Maintain knowledge on Macros (internal and external sources), Tools, design methodologies and flows;
9.Macro validation, characterization and customer support, including debugging and analysis report.
10.Writing internal design documents, design reports, review repot, evaluation plans/docs...
11.Support:--Provide design documentation, descriptions and information to application engineers, field application engineers, product engineers, and customers.--Contribute test specifications and support evaluation of the design in coordination with application and product engineering.

Qualifications: (Education, Experience, etc.)
1.Education: Bachelor / Master degree or Above;
2.work Experience: 5+ years experience on circuit design or chip integration design.
3.Expertise / Skills:--well known IC integration flow;--Good knowledge in CMOS digital circuit, timing and power analysis;--Good knowledge in digital IC design EDA tools, such as ncsim, Design Compiler, Primetime, Astro/ICC etc;--Experience in Circuit design or Verilog coding.--Familiar with Script language (Perl / TCL);--Fluent spoken and written English (frequent communication with overseas teams).



图像处理的职位（3D graphic)

Sr. ASIC Design Engineer Graphic IP  *1

Position Summary

do micro-architecture, rtl coding, simulation and sythesis flow of graphic pipe-line etc.

Job Location

ShangHai, P.R.C

Responsibilities

• Do micro-architcture based on the architecture spec.
• Develop the RTL code based on the micro-architecture   
• Simulation flow and FPGA verification
• Synthesize after RTL freeze
• Work with back end teams to do time closure
• Verify functions
• Provide support for production issues
• Prepare documents

Qualifications

Required:

• Master degree or above, major in EE,CS or related.
• 2 - 10 years on front end logic design
• Good skill in RTL coding, simulation, synthesis and timing analysis;
• Strong hardware knowlege of computer architecture.
• CPU/DSP, Video/digital media, or graphic pipe-line design experience is required.
• Knowlege in computer graphics is a good plus.

14

Sr. ASIC Design Engineer Graphic IP
*2

Position Summary

do micro-architecture, rtl coding, simulation and sythesis flow of graphic pipe-line etc.

Job Location

ShangHai, P.R.C

Responsibilities

• Do micro-architcture based on the architecture spec.
• Develop the RTL code based on the micro-architecture   
• Simulation flow and FPGA verification
• Synthesize after RTL freeze
• Work with back end teams to do time closure
• Verify functions
• Provide support for production issues
• Prepare documents

Qualifications

Required:

• Master degree or above, major in EE,CS or related.
• 2 - 10 years on front end logic design
• Good skill in RTL coding, simulation, synthesis and timing analysis;
• Strong hardware knowlege of computer architecture.
• CPU/DSP, Video/digital media, or graphic pipe-line design experience is required.
• Knowlege in computer graphics is a good plus.

15

Architecture Design Engineer Graphic IP
*2

Position Summary

Do 2d/3d graphic architecture design, architecture moduling, test-plan and test-case, hw verification and sw-driver development support.etc.

Job Location

ShangHai, P.R.C

Responsibilities

• Do architecture design based on the graphic standard.
• Develop the architecture module based on the architecture spec.  
• Write test-plan.
• Develop the test-case.  
• Support hw verifications.  
• Support sw-driver development.
• Tuning the performance of graphic pipe.
• Prepare documents   

Qualifications

Required:

• Master degree or above, major in CS,EE or related.
• 2 - 10 years on graphic/video architcture design, graphic driver/application design.
• Good skill in C/C++, Familiar with perl/pythong is a good plus;
• Knowlege of computer architecture, OpenGL/DX is prefered.
• Knowlege in rtl coding is a good plus.

ASIC Engineer of SOC and Video system *1

-
SOC design

SOC methodology define and control

Lead and audit block level synthesis and timing closure

Top level synthesis

Top level STA (define SDC and be responsible to timing signoff)

Understand DFT flow, can do necessary support

-
Video design

IP level Micro-architecture, RTL Design, Verification, Synthesis and timing closure.

Solid knowledge and experience on video block design and debug

Top level architecture, including clock/reset structure, address mapping, bandwidth analysis, etc

Requirements:

Must have:

BSEE Degree or above

3 or 5 years of experience in ASIC design

Familiar with industry synthesis/STA/formal tools

Familiar with at least one of script language such as perl/tcl/shell

Solid RTL design experience, better in video system

Self-motivated in solving problems

Good communication skills and fluent in English.

Good team player

转sales的ic engineer 可以看看下面的机会

IP and Technical Sales Engineer

Job Function:

1. To drive business decisions on XX IP strategy (IP roadmap) and its implementation (make-or-license from third party)
2.To provide the necessary high-quality, high performance IPs (e.g. libraries, design building blocks) to XX customers and define the related business models
3.To provide the high-quality, fast turn-around time IP solution for XX customers and the related business models
4.To establish foundry-specific IP relationship with strategic IP vendors and partners.

5. Act as technical support engineer to support sales

Responsibilities:
1.Communicate with customers to understand IP requirements.
2. Provide tools and assist Sales to implement IP and Design Service business cases
3.Continuous improvement of IP Quality system and IP database
4.Provide decision proposals for IP roadmap and implementation

5. Collaborate with Account Mangers and Engineering group to come up with complete technical proposal which satisfies Customer's requirements.

6. Support Account Managers to provide direct technical support and communication with customers.

Requirement:

1.
Related major of EE

2.
Bachelor above

3.
3+ years design experience

4.
Teamwork, dedication, strong communications and interpersonal skills

5.
5. Fluent oral and written English is plus

北京的职位是一个顶级美资公司的数字设计（需要懂些模拟的知识）

1

Digital design engineer

Responsibility:

Participate in mix-signal IC development high speed mix signal products, working with multi-site engineers on different functions such as analog design, application, product evaluation and layout. The incumbent is expected to contribute to signal chain understanding/partition, algorithm development, design, verification, synthesis, timing and power analysis. And he/she is also required be able to understand the inputs from application engineers to translate real world issues to design requirements. Some basic lab skill to work with product evaluation engineers and understanding real silicon issue is also needed.

Requirement:

Ø
MSEE or above in EE related majors

Ø
At least 2-3 years working experience on RTL related design, verification and implementation for FPGA or ASIC. Real mixed signal ASIC experience is preferred. High speed design experience is a strong plus but not necessary required.

Ø
Knowledge on signal processing is a strong plus. The candidate should know well on sampling theory, filter design, and some of algorithm development skills.

Ø
Have FPGA or real silicon experience and have chance to look at silicon functions and performance with good silicon debugging skills.

Ø
Have basic system understanding of converters/PLL or at signal chain level.

Ø
Self motivated, result oriented, team player and good communication skills.

Ø
Solid problem solving skills and leadership experience are appreciated.

Ø
Good spoken and written English

2

Senior Digital Design and Verification Engineer

Job Responsibilities:

l  Participate in the mixed-signal product development, including digital design, verification, and implementation.

l  Lead to define the product architectures, determine design approaches and parameters

l  Digital signal processing design and verification

l  Top-level integration and verification

Requirement:

l  MSEE or PhD in EE or microelectronics

l  +3 years working experience in RTL design and verification

l  Knowledge on communication system or signal processing is a strong plus

l  Experience with mixed signal design or integration is preferred

l  Familiar with digital design flow and tools, can use synopsys dc/dftc/pt/formality, cadence nc_verilog

l  Self motivated, result oriented, team player and solid communication skills

l
Good spoken and written English

3

Application Engineer for ISO-BDC

ADI’s iCoupler products are widely used in industry, automotive and other fields. The successful candidate will be required to work with the development team on product evaluation, datasheet, application note, product definition and to support ISO key customers in system structure recommendation, problem diagnosis and trouble shooting. He/she is also responsible for iCoupler products’ promotion in China market.

Qualification:

•
MSEE/PHD in Electrical Engineering or Computer Engineering. 2 year+ experience for MSEE and 1 year+ for PHD.

•
Experience in any of below is a plus.

•
PCB schematic and layout experience

•
Understand basic circuit theory and basic analog circuit design theory

•
Understand IC evaluation and performance specification measurement theory and technique

•
Proven track record of innovative initiatives in previous designs

•
Self motivating, good team player and good communication skill

•
Good English speaking and writing skill.

•
Flexibility to have oversea and/or domestic travels

•
Familiar with safety certification and experience in iCoupler (ADuMxxxx) products is preferred.

上面的大多是数字设计的职位，还有后端/验证/FAE /AE/没有贴出哈，如果有人感兴趣也可以联系我们发JD给您

联系方式：

Carrie
=======================================
Shanghai Key-Team Human Resources Consulting Co.,Ltd
Add: Room 1310, Huashen building , No.1085 Pudong South Road, Shanghai China
Tel: (86)021-61023600-25
Mobile86)139 1607 0643
Email: carrie-hu@kthr.com  
MSN:mimmimhu@msn.com
http://www.kthr.com
Profile:http://cn.linkedin.com/pub/carrie-hu/27/971/74b

carrie_kthr

ding a ding 欢迎骚扰咨询

carrie_kthr

顶顶顶 O(∩_∩)O哈哈哈~

carrie_kthr

顶顶顶 哇哇哇 大家莫打

carrie_kthr

DINGDINGIDNG

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顶一下

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