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CHAPTER-1 TRANSISTOR THEORY
CHAPTER-2 INTRODUCTION TO MOSFETS
CHAPTER-3 CMOS Transistor Fundamentals
CHAPTER-4 Transistor Theory (Contd)
CHAPTER-5 CMOS Transistor Theory - Delay Issues
CHAPTER-6 CMOS Transistor Theory - Delay Issues (Contd)
CHAPTER-7 CMOS Transistor Theory - Delay Models
CHAPTER-8 Delay Elements in CMOS Circuits
CHAPTER-9 Delay Elements in CMOS Circuits (Contd)
CHAPTER-10 Estimating Delays in a circuit, Issues in Dynamic and Staic Timing analysis
CHAPTER-11 SYNTHESIS
CHAPTER-12 Synthesis - Synthesizable and Non Synthesizable constructs
CHAPTER-13 Synthesis - Logic Optimization, Resource Sharing
CHAPTER-14 Synthesis - Logic Optimization, Resource Sharing (Contd)
CHAPTER-15 Flip Flop and Latch optimaztion
CHAPTER-16 Introduction to Logical Effort
CHAPTER-17 Multistage Logic Networks
CHAPTER-18 Logical effort - Optimizing performance
CHAPTER-19 Logical Effort and Gain based Synthesis
CHAPTER-20 Logical Effort and Gain based Synthesis (Contd)
CAD_FOR_VLSI.rar
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