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[资料] A Novel DCXO Module for Clock Synchronization in MPEG2 Transport System

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发表于 2010-8-11 14:58:14 | 显示全部楼层 |阅读模式

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Abstract—This paper presents a unique on-chip digital control
crystal oscillator (DCXO) module that is used for clock synchronization
in MPEG2 data transport system. This module is built
inside a phase-locked loop (PLL) and is achieved through flyingadder
frequency synthesis architecture. It is designed at 27 MHz
with a tuning range of 􀀀 kHz. The linearity at the range of 27
MHz 􀀀 kHz is measured as 0.001%. The frequency resolution
is 1.6 Hz. This DCXO and its associated PLL consume 10 mWand
occupies 0.15 mm􀀀 in a 90-nm CMOS process. The contribution of
this work is that this built-in DCXO can completely eliminate the
need of external voltage-control crystal oscillator (VCXO) chip or
on-chip VCXO block in MPEG2 clock synchronization and thus
significantly reduces the system cost. This module has been used in
a real HDTV SoC chip.

2008 A Novel DCXO Module for Clock Synchronization in MPEG2 Transport System.pdf

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发表于 2010-8-11 15:28:15 | 显示全部楼层
thank you eetop.
发表于 2011-3-6 18:18:49 | 显示全部楼层
good thx
发表于 2011-3-7 16:21:06 | 显示全部楼层
thanks!!!!!
发表于 2011-3-8 10:39:48 | 显示全部楼层
THANKS FOR SHARING
发表于 2011-5-19 21:51:53 | 显示全部楼层
THANKS A LOT
发表于 2013-5-3 15:12:42 | 显示全部楼层
kan kan
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