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Description
Responsible for R2G implementation, including full chip implementation and physical verification, as well as tapeout process.
Able to resolve implementation issues, including timing violation, congestion, SI, IR drop, power optimization.
Able to produce DRC and LVS clean layout, optimized for density, power, performance and manufacturability.
Active technical communications with other backend engineers from different xx sites.
Qualifications:
Master with 2+ years or BE with 5+ years of digital implementation working experience.
Solid experience with synthesis, DFT, floorplan, place & routing, CTS, physical design verification, and parasitics extraction.
Familiar with static timing analysis, signal integrity analysis/fixing, IR drop analysis.
Familiar with using Synopsys back-end tools, like Astro, Hercules, StarRC-XT.
Be a team player who can interact across borders and is adaptable to changes.
Have a high level of integrity and character.
English language skill is necessary.
BS or above with major in EE or related field.
Knowledge of HDLs (Verilog).
Knowledge of scripting languages (Perl, TCL, Scheme).
Knowledge of physical synthesis.
Knowledge of digital circuit RTL2GDSII implementation flow.
Experience with 90nm/65nm physical design is preferred.
KT Human Resources Consulting Company (Shanghai) was established in 2001 in response to a need for a recruitment consultancy to be an active, contributing member of the semiconductor community, as opposed to simply a supplier to it.We provide professional search and talent acquisition in the Integrated Circuit、Electronic、Telecommunications industry of international corporations in Greater China. Our client list contains numerous international companies, many of them are long-term customers.
If you interested in the job, pls sent your cv to: lincy-cao@kthr.com, thanks! |
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